Philips Semiconductors Product data sheet
SC28L202Dual UART
2005 Nov 01
53
REGISTER MAP
NOTE: The register maps for channels A and B (UARTs A and B) contain some control registers that configure the entire chip.
These are denoted by a ‘•’ symbol
A[6:0]
READ WRITE
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100 0000 (0x40) System Enable Status (SES A) Watchdog, Character and X Enable(WCXER A)
100 0001 (0x41) Xon Character Register (XonCR A) Xon Character Register (XonCR A)
100 0010 (0x42) Xoff Character Register (XoffCR A) Xoff Character Register (XoffCR A)
100 0011 (0x43) Address Recognition Character (ARCR A) Address Recognition Character (ARCR A)
100 0100 (0x44) Xon/Xoff Interrupt Status Register (XISR A)
100 0101 (0x45) Special Function Register (SFR A) Special Function Register (SFR A)
100 0110 (0x46) Receiver FIFO Interrupt Level (RxFIL A) Receiver FIFO Interrupt Level (RxFIL A)
100 0111 (0x47) Transmitter FIFO Interrupt Level (TxFIL A) Transmitter FIFO Interrupt Level (TxFIL A)
100 1000 (0x48) System Enable Status (SES B) Watchdog, Character and X Enable (WCXER B)
100 1001 (0x49) Xon Character Register (XonCR B) Xon Character Register (XonCR B)
100 1010 (0x4A) Xoff Character Register (XoffCR B) Xoff Character Register (XoffCR B)
100 1011 (0x4B) Address Recognition Character (ARCR B) Address Recognition Character (ARCR B)
100 1100 (0x4C) Xon/Xoff Interrupt Status Register (XISR B)
100 1101 (0x4D) Special Function Register (SFR B) Special Function Register (SFR B)
100 1110 (0x4E) Receiver FIFO Interrupt Level (RxFIL B) Receiver FIFO Interrupt Level (RxFIL B)
100 1111 (0x4F) Transmitter FIFO Interrupt Level (TxFIL B) Transmitter FIFO Interrupt Level (TxFIL B)
101 0000 (0x50) Bidding Control Register – Break Change (BCRBRK A) Bidding Control Register – Break Change (BCRBRK A)
101 0001 (0x51) Bidding Control Register – Change of State (BCRCOS A) Bidding Control Register – Change of State (BCRCOS A)
101 0010 (0x52) Bidding Control Register – Counter/Timer (BCRCT A) Bidding Control Register – Counter/Timer (BCRCT A)
101 0011 (0x53) Bidding Control Register – Xon (BCRx A) Bidding Control Register – Xon (BCRx A)
101 0100 (0x54) Bidding Control Register – Address (BCRA A) Bidding Control Register – Address (BCRA A)
101 0101 (0x55) Bidding Control Register – Loop Back Error (BCRLBE A) Bidding Control Register – Loop Back Error (BCRLBE A)
101 0110 (0x56)
101 0111 (0x57)
101 1000 (0x58) Bidding Control Register – Break Change (BCRBRK B) Bidding Control Register – Break Change (BCRBRK B)
101 1001 (0x59) Bidding Control Register – Change of State (BCRCOS B) Bidding Control Register – Change of State (BCRCOS B)
101 1010 (0x5A) Bidding Control Register – Counter/Timer (BCRCT B) Bidding Control Register – Counter/Timer (BCRCT B)
101 1011 (0x5B) Bidding Control Register – Xon (BCRx B) Bidding Control Register – Xon (BCRx B)
101 1100 (0x5C) Bidding Control Register – Address (BCRA B) Bidding Control Register – Address (BCRA B)
101 1101 (0x5D) Bidding Control Register – Loop Back Error (BCRLBE B) Bidding Control Register – Loop Back Error (BCRLBE B)
101 1110 (0x5E)
101 1111 (0x5F)