TB6561FG,8,EL

TB6561FG
2010-08-17
4
Electrical Characteristics
(V
CC
=
24 V, T
a
=
25°C)
Characteristics Symbol
Test
Circuit
Test Condition Min Typ. Max Unit
I
CC1
Stop mode 5.5 10
I
CC2
Forward/Reverse mode 5.0 9
I
CC3
Short brake mode 5.5 10
Supply current
I
CC4
Standby mode 1.5 3
mA
V
INH
2.3 5.5
Input voltage
V
INL
0.2 0.8
Hysteresis voltage V
IN (HYS)
(Design guarantee) 0.4
V
I
INH
V
IN
= 5 V 30 50 75
Control
circuit
Input current
I
INL
V
IN
= 0 V 5
μA
V
PWMH
2.3 5.5
Input voltage
V
PWML
0.2 0.8
Hysteresis voltage
V
PWM (HYS)
(Design guarantee) 0.4
V
I
PWMH
V
PWM
= 5 V 30 50 75
Input current
I
PWML
V
PWM
= 0 V 5
μA
PWM frequency
f
PWM
Duty: 50 % 100 kHz
PWM input
circuit
Minimum clock pulse
width
t
w(PWM)
2.0 μs
V
INSH
2.3 5.5
Input voltage
V
INSL
0.2 0.8
Hysteresis voltage
V
IN (HYS)
(Design guarantee) 0.4
V
I
INSH
V
IN
= 5 V 30 50 75
Standby
circuit
Input current
I
INSL
V
IN
= 0 V 5
μA
I
O
= 0.2 A 1.5 2.0
Output ON resistance R
on (U+L)
I
O
= 1.5 A 1.5 2.0
Ω
I
L (U)
V
CC
= 40 V 10
Output leakage current
I
L (L)
V
CC
= 40 V
10
μA
V
F (U)
I
O
= 1.5 A 1.3 2.0
Diode forward voltage
V
F (L)
I
O
= 1.5 A 1.3 2.0
V
Internal reference voltage V
reg
I
reg
= 1mA 4.75
5
5.25 V
V
CLD(H)
4.25 V
reg
Output signal of current limiter
detection
V
CLD(L)
I
O
= 50μA
0.5
V
Offset time for current limiter I
SD (OFF)
(Design guarantee)
50
μs
Thermal shutdown circuit operating
temperature
T
SD
(Design guarantee) 160 °C
TB6561FG
2010-08-17
5
Input/Output Function
Input Output
IN1 IN2 SB PWM OUT1 OUT2 Mode
H H H
H
L
L L Short brake
L H H
H
L
L
L
H
L
CW/CCW
Short brake
H L H
H
L
H
L
L
L
CCW/CW
Short brake
L L H
H
L
OFF
(high-impedance)
Stop
H/L H/L L
H
L
OFF
(high-impedance)
Standby
Current Limiter Detection Circuit (CLD)
The CLD pin outputs the states of the current limiter and thermal shutdown circuits. If the current limiter
for either channel A or B or the thermal shutdown circuit (shared for both channels) operates, the CLD pin
state changes from low (normal state) to high.
The CLD circuit supports automatic recovery; its output returns to low once the current decreases to a
value below the limit or once the thermal shutdown state is released.
Mode CLD Output
Under TSD operation and
current detection
H
Normal L
When current limiter operated
I
LIM
50 μs
(typ.)
0
10 μs
(typ.)
Not detected
50 μs
(typ.)
10 μs
(typ.)
Output current
CLD output
H
L
OFF time
OFF time
160°C (typ.)
Chip temperature
CLD output
H
L
120°C (typ.)
TSD
TB6561FG
2010-08-17
6
PWM control function
Applying a PWM signal of 0/5 V to the PWM pin allows motor speed control.
The IC enters CW (CCW) mode and short brake mode alternately in PWM current control.
To prevent shoot-through current caused by simultaneous conduction of upper and lower transistors in
the output stage, a dead time is internally generated for 300 ns (target spec) when switching the upper
and lower transistors.
Therefore, synchronous rectification for high efficiency in PWM current control can be achieved without
an off-time that is generated via an external input.
Even when toggling between CW and CCW modes, and CW (CCW) and short brake modes, the off-time
is not required due to the internally generated dead time.
Thermal Shutdown Circuit (TSD)
The IC incorporates a thermal shutdown circuit. When the junction temperature (T
j
) reaches 160°C (typ.), the
output transistors are turned off.
After 50 μs (typ.), the output transistors are turned on automatically.
The IC has 40°C of temperature hysteresis.
T
SD
= 160°C (target spec)
ΔT
SD
= 40°C (target spec)
P-GND
V
CC
Output voltage
waveform
(OUT1)
t1
t2
t3
t5
t4
V
CC
M
P-GND
PWM ON
t1
OUT1
PWM ON
t5
V
CC
M
OUT1
P-GND
V
CC
M
PWM ON OFF
t2 = 500 ns (typ.)
OUT1
P-GND
V
CC
M
PWM OFF
t3
OUT1
P-GND
V
CC
M
PWM OFF ON
t4 = 500 ns (typ.)
OUT1
P-GND

TB6561FG,8,EL

Mfr. #:
Manufacturer:
Toshiba
Description:
Motor / Motion / Ignition Controllers & Drivers Brush Motor Driver IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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