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TDA7575BPD

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I2C bus interface TDA7575B
16/32 Doc ID 14103 Rev 3
5 I
2
C bus interface
Data transmission from microprocessor to the TDA7575B and vice versa takes place
through the 2 wires I
2
C BUS interface, consisting of the two lines SDA and SCL (pull-up
resistors to positive supply voltage must be connected).
5.1 Data validity
As shown by Figure 26, the data on the SDA line must be stable during the high period of
the clock.
The high and low state of the data line can only change when the clock signal on the SCL
line is low.
5.2 Start and stop conditions
As shown by Figure 27 a start condition is a high to low transition of the SDA line while SCL
is high.
The stop condItion Is A Low To High Transition of the SDA line while SCL is high.
5.3 Byte format
Every byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an
acknowledge bit. The MSB is transferred first.
5.4 Acknowledge
The transmitter
(*)
puts a resistive HIGH level on the SDA line during the acknowledge clock
pulse (see Figure 28). The receiver
(**)
the acknowledges has to pull-down (LOW) the SDA
line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock
pulse.
(*) Transmitter
=master (P) when it writes an address to the TDA7575B
= slave (TDA7575B) when the µP reads a data byte from TDA7575B
(**) Receiver
= slave (TDA7575B) when the µP writes an address to the TDA7575B
=master (P) when it reads a data byte from TDA7575B
Figure 26. Data validity on the I
2
C bus
SDA
SCL
DATA LINE
STABLE, DATA
VALID
CHANGE
DATA
ALLOWED
D99AU1031
TDA7575B I2C bus interface
Doc ID 14103 Rev 3 17/32
Figure 27. Timing diagram on the I
2
C bus
Figure 28. Timing acknowledge clock pulse
5.5 1 capability setting
It is possible to drive 1 load paralleling the outputs into a single channel.
In order to implement this feature, outputs are to be connected on the board as follows:
● OUT1+ (pin 35 and pin 36) shorted to OUT2+ (pin 19 and pin 20)
● OUT1- (pin 28 and pin 29) shorted to OUT2- (pin 26 and pin 27).
It is recommended to minimize the impedance on the board between OUT2 and the load in
order to minimize THD distortion. It is also recommended to control the maximum mismatch
impedance between V
CC
pins (pin 21/pin 22 respect to pin 33/pin 34) and between PWGND
pins (pin 24/pin 25 respect to pin 30/pin 31), mismatch that must not exceed a value of
20 m
With 1 feature settled the active input is IN2 (pin 17 and pin 18), therefore IN1 pins should
be let floating.
It is possible to set the load capability acting on 1 pin as follows:
1 pin (pin 15) < 1.5 V: two channels mode (for a minimum load of 2 )
1 pin (pin 15) > 2.5 V: one channel mode (for 1 load).
It is to remember that 1
Ohmfunction is a hardware selection.
Therefore it is recommended to leave 1
pin floating or shorted to GND to set the two
channels mode configuration, or to short 1 pin to V
CC
to set the one channel (1)
configuration.
SCL
SDA
START
I
2
CBUS
STOP
D99AU1032
SCL
1
MSB
23789
SDA
START
ACKNOWLEDGMENT
FROM RECEIVER
D99AU1033
I2C bus interface TDA7575B
18/32 Doc ID 14103 Rev 3
5.6 I
2
C abilitation setting
It is possible to disable the I
2
C interface by acting on I
2
C pin (pin 16) and control the
TDA7575B by means of the usual standby and mute pins. In order to activate or deactivate
this feature, I
2
C pin must be set as follows:
● I
2
C pin (pin 16) < 1.5V: I
2
C bus interface deactivated
● I
2
C pin (pin 16) > 2.5V: I
2
C bus interface activated
It is also possible to let I
2
C pin floating to deactivate the I
2
C bus interface, or to short I
2
C pin
to V
CC
to activate it.
In particular:
● I
2
C enabled: I
2
C pin (pin 16) > 2.5 V
– STD mode: V
st-by
(pin 5) > 3.5 V, IB2(D1)=0
–HE mode: V
st-by
(pin 5) > 3.5 V, IB2(D1)=1
– Play mode: V
mute
(pin 4) >3.5 V, IB1 (D2) = 1
The amplifier can always be switched off by putting V
st-by
to 0V , but with I
2
C enabled it can
be turn on only through I
2
C (with V
st-by
> 3.5 V).
● I
2
C disabled: I
2
C pin (pin 16) < 1.5 V
– STD mode: 3.5V < standby (pin 5) < 5
–HE mode: V
stby
(pin 5) > 7 V
– Play mode: V
mute
(pin 4) > 3.5 V
For both STD and HE mode the play/mute mode can be set acting on V
mute
pin.
When I
2
C bus is disabled, when a fault is detected pin 14 (CD-OUT) is pulled down by the
internal logic circuitry. The faults detected are the short circuit to ground, to V
CC
and across
the load (after an aver current detection).
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TDA7575BPD

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Buy TDA7575BPD
Manufacturer:
STMicroelectronics
Description:
Audio Amplifiers 2 x 75W Multifunct Dual-Bridge Pwr Amp
Lifecycle:
New from this manufacturer.
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