74HC373
http://onsemi.com
5
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6.0 ns)
Symbol Parameter
V
CC
(V)
Guaranteed Limit
Unit
– 55 to 25_C v 85_C v 125_C
t
PLH
t
PHL
Maximum Propagation Delay, Input D to Q
(Figures 1 and 5)
2.0
3.0
4.5
6.0
125
80
25
21
155
110
31
26
190
130
38
32
ns
t
PLH
t
PHL
Maximum Propagation Delay, Latch Enable to Q
(Figures 2 and 5)
2.0
3.0
4.5
6.0
140
90
28
24
175
120
35
30
210
140
42
36
ns
t
PLZ
t
PHZ
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
2.0
3.0
4.5
6.0
150
100
30
26
190
125
38
33
225
150
45
38
ns
t
PZL
t
PZH
Maximum Propagation Delay, Output Enable to Q
(Figures 3 and 6)
2.0
3.0
4.5
6.0
150
100
30
26
190
125
38
33
225
150
45
38
ns
t
TLH
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 5)
2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
C
in
Maximum Input Capacitance 10 10 10 pF
C
out
Maximum Three−State Output Capacitance
(Output in High−Impedance State)
15 15 15 pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
C
PD
Power Dissipation Capacitance (Per Enabled Output)*
Typical @ 25°C, V
CC
= 5.0 V
pF
36
* Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
