MAX9392/MAX9393
Applications Information
Differential Inputs
The MAX9392/MAX9393 inputs accept any differential
signaling standard within the specified common-mode
voltage range. The fail-safe feature detects common-
mode input signal levels and generates a differential
output low condition for undriven inputs or when the
common-mode voltage exceeds the specified range.
Leave unused inputs unconnected or connect to V
CC
for the MAX9392 or to GND for the MAX9393.
Differential Outputs
The output common-mode voltage is not properly
established if the LVDS output is higher than 0.6V when
the supply voltage is ramping up at power-on. This
condition can occur when an LVDS output drives an
LVDS input on the same chip. To avoid this situation for
the MAX9392/MAX9393, connect a 10kΩ resistor from
the noninverting output (OUT_) to ground, and connect
a 10kΩ resistor from the inverting output (OUT_) to
ground. These pulldown resistors keep the output
below 0.6V when the supply is ramping up (Figure 8).
Expanding the Number of LVDS Output
Ports
Cascade devices to make larger switches. Consider
the total propagation delay and total jitter when deter-
mining the maximum allowable switch size.
Power-Supply Bypassing
Bypass each V
CC
to GND with high-frequency surface-
mount ceramic 0.1µF and 0.01µF capacitors in parallel
as close to the device as possible. Install the 0.01µF
capacitor closest to the device.
Differential Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9392/MAX9393. Connect each input
and output to a 50Ω characteristic impedance trace.
Maintain the distance between differential traces and
eliminate sharp corners to avoid discontinuities in dif-
ferential impedance and maximize common-mode
noise immunity. Minimize the number of vias on the dif-
ferential input and output traces to prevent impedance
discontinuities. Reduce reflections by maintaining the
50Ω characteristic impedance through connectors and
across cables. Minimize skew by matching the electri-
cal length of the traces.
Output Termination
Terminate LVDS outputs with a 100Ω resistor between
the differential outputs at the receiver inputs. LVDS out-
puts require 100Ω termination for proper operation.
Ensure that the output currents do not exceed the cur-
rent limits specified in the Absolute Maximum Ratings.
Observe the total thermal limits of the MAX9392/
MAX9393 under all operating conditions.
Cables and Connectors
Use matched differential impedance for transmission
media. Use cables and connectors with matched differ-
ential impedance to minimize impedance discontinu-
ities. Avoid the use of unbalanced cables. Balanced
cables such as twisted pair offer superior signal quality
and tend to generate less EMI due to canceling effects.
Board Layout
Use a four-layer printed circuit (PC) board providing
separate signal, power, and ground planes for high-
speed signaling applications. Bypass V
CC
to GND as
close to the device as possible. Install termination
resistors as close to receiver inputs as possible. Match
the electrical length of the differential traces to minimize
signal skew.
Anything-to-LVDS Dual 2 x 2
Crosspoint Switches
10 ______________________________________________________________________________________
Table 1. Input/Output Function Table
