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PCA9633D16,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P43
PCA9633_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 25 July 2008 10 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
7.2 Control register
Following the successful acknowledgement of the slave address, LED All Call address or
LED Sub Call address, the bus master will send a byte to the PCA9633, which will be
stored in the Control register.
The lowest 4 bits are used as a pointer to determine which register will be accessed
(D[3:0]). The highest 3 bits are used as Auto-Increment flag and Auto-Increment options
(AI[2:0]). Bit 4 is unused and must be programmed with zero (0) for proper device
operation.
When the Auto-Increment flag is set (AI2 = 1), the four low order bits of the Control
register are automatically incremented after a read or write. This allows the user to
program the registers sequentially. Four different types of Auto-Increment are possible,
depending on AI1 and AI0 values.
Remark: Other combinations not shown in Table 6 (AI[2:0] = 001, 010, and 011) are
reserved and must not be used for proper device operation.
AI[2:0] = 000 is used when the same register must be accessed several times during a
single I
2
C-bus communication, for example, changes the brightness of a single LED. Data
is overwritten each time the register is accessed during a write operation.
AI[2:0] = 100 is used when all the registers must be sequentially accessed, for example,
power-up programming.
AI[2:0] = 101 is used when the four LED drivers must be individually programmed with
different values during the same I
2
C-bus communication, for example, changing color
setting to another color setting.
reset state = 80h
Remark: The Control register does not apply to the Software Reset I
2
C-bus address.
Fig 10. Control register
Table 6. Auto-Increment options
AI2 AI1 AI0 Function
0 0 0 no Auto-Increment
1 0 0 Auto-Increment for all registers. D3, D2, D1, D0 roll over to ‘0000’ after
the last register (1100) is accessed.
1 0 1 Auto-Increment for individual brightness registers only. D3, D2, D1, D0
roll over to ‘0010’ after the last register (0101) is accessed.
1 1 0 Auto-Increment for global control registers only. D3, D2, D1, D0 roll over
to ‘0110’ after the last register (0111) is accessed.
1 1 1 Auto-Increment for individual and global control registers only. D3, D2,
D1, D0 roll over to ‘0010’ after the last register (0111) is accessed.
002aab296
AI2 AI1 AI0 0 D3 D2 D1 D0
Auto-Increment flag
register address
Auto-Increment options
PCA9633_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 25 July 2008 11 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
AI[2:0] = 110 is used when the LED drivers must be globally programmed with different
settings during the same I
2
C-bus communication, for example, global brightness or
blinking change.
AI[2:0] = 111 is used when individual and global changes must be performed during the
same I
2
C-bus communication, for example, changing a color and global brightness at the
same time.
Only the 4 least significant bits D[3:0] are affected by the AI[2:0] bits.
When the Control register is written, the register entry point determined by D[3:0] is the
first register that will be addressed (read or write operation), and can be anywhere
between 0000 and 1100 (as defined in Table 7). When AI[2] = 1, the Auto-Increment flag
is set and the rollover value at which the point where the register increment stops and
goes to the next one is determined by AI[2:0]. See Table 6 for rollover values. For
example, if the Control register = 1110 1000 (E8h), then the register addressing sequence
will be (in hex):
08 → … → 0C → 00 → … → 07 → 02 → … → 07 → 02 → … → 07 → 02 → … as long
as the master keeps sending or reading data.
7.3 Register definitions
[1] Only D[3:0] = 0000 to 1100 are allowed and will be acknowledged. D[3:0] = 1101, 1110, or 1111 are reserved and will not be
acknowledged.
[2] When writing to the Control register, bit 4 must be programmed with logic 0 for proper device operation.
Table 7. Register summary
[1][2]
Register number (hex) D3 D2 D1 D0 Name Type Function
00h 0 0 0 0 MODE1 read/write Mode register 1
01h 0 0 0 1 MODE2 read/write Mode register 2
02h 0 0 1 0 PWM0 read/write brightness control LED0
03h 0 0 1 1 PWM1 read/write brightness control LED1
04h 0 1 0 0 PWM2 read/write brightness control LED2
05h 0 1 0 1 PWM3 read/write brightness control LED3
06h 0 1 1 0 GRPPWM read/write group duty cycle control
07h 0 1 1 1 GRPFREQ read/write group frequency
08h 1 0 0 0 LEDOUT read/write LED output state
09h 1 0 0 1 SUBADR1 read/write I
2
C-bus subaddress 1
0Ah 1 0 1 0 SUBADR2 read/write I
2
C-bus subaddress 2
0Bh 1 0 1 1 SUBADR3 read/write I
2
C-bus subaddress 3
0Ch 1 1 0 0 ALLCALLADR read/write LED All Call I
2
C-bus address
PCA9633_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 25 July 2008 12 of 43
NXP Semiconductors
PCA9633
4-bit Fm+ I
2
C-bus LED driver
7.3.1 Mode register 1, MODE1
[1] It takes 500 µs max. for the oscillator to be up and running once SLEEP bit has been set to logic 0. Timings on LEDn outputs are not
guaranteed if PWMx, GRPPWM or GRPFREQ registers are accessed within the 500 µs window.
[2] When the oscillator is off (Sleep mode) the LED outputs cannot be turned on, off or dimmed/blinked.
7.3.2 Mode register 2, MODE2
Table 8. MODE1 - Mode register 1 (address 00h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 AI2 read only 0 Register Auto-Increment disabled
1* Register Auto-Increment enabled
6 AI1 read only 0* Auto-Increment bit1=0
1 Auto-Increment bit1=1
5 AI0 read only 0* Auto-Increment bit0=0
1 Auto-Increment bit0=1
4 SLEEP R/W 0 Normal mode
[1]
.
1* Low power mode. Oscillator off
[2]
.
3 SUB1 R/W 0* PCA9633 does not respond to I
2
C-bus subaddress 1.
1 PCA9633 responds to I
2
C-bus subaddress 1.
2 SUB2 R/W 0* PCA9633 does not respond to I
2
C-bus subaddress 2.
1 PCA9633 responds to I
2
C-bus subaddress 2.
1 SUB3 R/W 0* PCA9633 does not respond to I
2
C-bus subaddress 3.
1 PCA9633 responds to I
2
C-bus subaddress 3.
0 ALLCALL R/W 0 PCA9633 does not respond to LED All Call I
2
C-bus address.
1* PCA9633 responds to LED All Call I
2
C-bus address.
Table 9. MODE2 - Mode register 2 (address 01h) bit description
Legend: * default value.
Bit Symbol Access Value Description
7 - read only 0* reserved
6 - read only 0* reserved
5 DMBLNK R/W 0* Group control = dimming
1 Group control = blinking
4 INVRT
[1]
R/W 0* Output logic state not inverted. Value to use when no external driver used.
Applicable when
OE = 0 for PCA9633 16-pin version.
1 Output logic state inverted. Value to use when external driver used.
Applicable when
OE = 0 for PCA9633 16-pin version.
3 OCH R/W 0* Outputs change on STOP command.
[2]
1 Outputs change on ACK.
2 OUTDRV
[1]
R/W 0 The 4 LED outputs are configured with an open-drain structure.
1* The 4 LED outputs are configured with a totem pole structure.
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PCA9633D16,112

Mfr. #:
Buy PCA9633D16,112
Manufacturer:
NXP Semiconductors
Description:
LED Lighting Drivers LED DRVR 4BIT I2C
Lifecycle:
New from this manufacturer.
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