PCF85063BTL All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 6 — 18 November 2015 26 of 58
NXP Semiconductors
PCF85063BTL
Tiny Real-Time Clock/calendar with alarm function and SPI-bus
8.5.5 Register Weekday_alarm
[1] Default value.
8.5.6 Alarm function
By clearing the alarm enable bit (AEN_x) of one or more of the alarm registers, the
corresponding alarm condition(s) are active. When an alarm occurs, AF is set logic 1. The
asserted AF can be used to generate an interrupt (INT
). The AF is cleared by command.
The registers at addresses 0Bh through 0Fh contain alarm information. When one or
more of these registers is loaded with second, minute, hour, day or weekday, and its
corresponding AEN_x is logic 0, then that information is compared with the current
second, minute, hour, day, and weekday. When all enabled comparisons first match, the
alarm flag (AF in register Control_2) is set logic 1.
The generation of interrupts from the alarm function is controlled via bit AIE. If bit AIE is
enabled, the INT
pin follows the condition of bit AF. AF remains set until cleared by
command. Once AF has been cleared, it will only be set again when the time increments
to match the alarm condition once more. Alarm registers which have their AEN_x bit at
logic 1 are ignored.
Table 33. Weekday_alarm - weekday alarm register (address 0Fh) bit description
Bit Symbol Value Description
7 AEN_W weekday alarm
0 enabled
1
[1]
disabled
6 to 3 - 0 unused
2to0 WEEKDAY_ALARM 0
[1]
to 6 weekday alarm information coded in BCD
format
