ESD9M5.0ST5G

© Semiconductor Components Industries, LLC, 2013
October, 2017 Rev. 6
1 Publication Order Number:
ESD9M5.0S/D
ESD9M5.0ST5G
ESD Protection Diode
UltraLow Capacitance
The ESD9M Series is designed to protect voltage sensitive components
that require low capacitance from ESD and transient voltage events.
Excellent clamping capability, low capacitance, low leakage, and fast
response time, make these parts ideal for ESD protection on designs that
utilize highspeed lines such as USB.
Specification Features:
Low Capacitance 2.5 pF
Low Clamping Voltage
Small Body Outline Dimensions:
0.039 x 0.024(1.00 mm x 0.60 mm)
Low Body Height: 0.016 (0.4 mm)
Standoff Voltage: 5 V
Low Leakage
Response Time is Typically < 1.0 ns
IEC6100042 Level 4 ESD Protection
AECQ101 Qualified and PPAP Capable
This is a PbFree Device
Mechanical Characteristics:
CASE:
Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V0
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating Symbol Value Unit
IEC 6100042 (ESD) Contact
Air
±10
±15
kV
Total Power Dissipation on FR5 Board
(Note 1) @ T
A
= 25°C
°P
D
° 150 mW
Junction and Storage Temperature Range T
J
, T
stg
55 to
+150
°C
Lead Solder Temperature Maximum
(10 Second Duration)
T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
Device Package Shipping
ORDERING INFORMATION
SOD923
CASE 514AB
ESD9M5.0ST5G SOD923
(PbFree)
8000/Tape & Reel
MARKING DIAGRAM
See specific marking information in the device marking
column of the Electrical Characteristics tables starting on
page 2 of this data sheet.
DEVICE MARKING INFORMATION
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
4 = Specific Device Code
M = Date Code
www.onsemi.com
4 M
ESD9M5.0ST5G
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
I
PP
Maximum Reverse Peak Pulse Current
V
C
Clamping Voltage @ I
PP
V
RWM
Working Peak Reverse Voltage
I
R
Maximum Reverse Leakage Current @ V
RWM
V
BR
Breakdown Voltage @ I
T
I
T
Test Current
I
F
Forward Current
V
F
Forward Voltage @ I
F
P
pk
Peak Power Dissipation
C Max. Capacitance @ V
R
= 0 and f = 1.0 MHz
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
UniDirectional
I
PP
I
F
V
I
I
R
I
T
V
RWM
V
C
V
BR
V
F
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise noted, V
F
= 1.0 V Max. @ I
F
= 10 mA for all types)
Device
Device
Marking
V
RWM
(V)
I
R
(mA)
@ V
RWM
V
BR
(V) @ I
T
(Note 2)
I
T
C (pF)
V
C
(V)
@ I
PP
= 1 A
(Note 4)
V
C
Max Max Min mA Max Max
Per IEC6100042
(Note 3)
ESD9M5.0ST5G 4* 5.0 1.0 5.8 1.0 2.5 9.8 Figures1and 2
See Below
* Rotated 270°.
* *The “G’’ suffix indicates PbFree package available.
***Other voltages available upon request.
2. V
BR
is measured with a pulse test current I
T
at an ambient temperature of 25°C.
3. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
4. Surge current waveform per Figure 5.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC6100042
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC6100042
ESD9M5.0ST5G
www.onsemi.com
3
IEC 6100042 Spec.
Level
Test
Voltage
(kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
I
peak
90%
10%
IEC6100042 Waveform
100%
I @ 30 ns
I @ 60 ns
t
P
= 0.7 ns to 1 ns
Figure 3. IEC6100042 Spec
Figure 4. Diagram of ESD Test Setup
50 W
Cable
Device
Under
Test
Oscilloscope
ESD Gun
50 W
The following is taken from Application Note
AND8308/D Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC6100042 waveform. Since the
IEC6100042 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
Figure 5. 8 x 20 ms Pulse Waveform
100
90
80
70
60
50
40
30
20
10
0
020406080
t, TIME (ms)
% OF PEAK PULSE CURRENT
t
P
t
r
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
PEAK VALUE I
RSM
@ 8 ms
HALF VALUE I
RSM
/2 @ 20 ms

ESD9M5.0ST5G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
TVS Diodes / ESD Suppressors ESD PROT UNI SOD923
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet