ADP3309ARTZ-2.5RL7

ADP3309
Rev. C | Page 9 of 12
THEORY OF OPERATION
The ADP3309 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
Q1
ADP3309
g
m
GND
R1
R2
R
LOAD
C
LOAD
(a)
OUTPUT
R3
D1
PTAT
V
OS
ATTENUATION
(V
BANDGAP
/V
OUT
)
R4
PTAT
CURRENT
COMPENSATION
CAPACITOR
NONINVERTING
WIDEBAND
DRIVER
INPUT
00141-022
Figure 22. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that at equilibrium, it
produces a large, temperature proportional input offset voltage
that is repeatable and very well controlled. The temperature
proportional offset voltage is combined with the complementary
diode voltage to form a virtual band gap voltage, implicit in the
network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more
flexibility on the trade-off of noise sources that leads to a low
noise design.
The R1, R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode (D1), and a second divider
consisting of R3 and R4, the values can be chosen to produce a
temperature stable output.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor (Q1). The use of this
special noninverting driver enables the frequency compensation
to include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and
resistance. Moreover, the ESR value, required to keep
conventional LDOs stable, changes depending on load and
temperature. These ESR limitations make designing with LDOs
more difficult because of their unclear specifications and
extreme variations over temperature.
This is no longer true with the ADP3309 anyCAP LDO. It can
be used with virtually any capacitor, with no constraint on the
minimum ESR. This innovative design allows the circuit to be
stable with just a small 0.47 μF capacitor on the output.
Additional advantages of the design scheme include superior
line noise rejection and very high regulator gain, which leads to
excellent line, and load regulation. An impressive ±2.2%
accuracy is guaranteed over line, load, and temperature.
Additional features of the circuit include current limit and
thermal shutdown. Compared to the standard solutions that
give warning after the output has lost regulation, the ADP3309
provides improved system performance by enabling the
ERR
pin to give warning before the device loses regulation.
As the chips temperature rises above 165°C, the circuit activates
a soft thermal shutdown, indicated by a signal low on the
ERR
pin, to reduce the current to a safe level.
ADP3309
Rev. C | Page 10 of 12
APPLICATION INFORMATION
CAPACITOR SELECTION: anyCAP
Output Capacitors: As with any micropower device, output
transient response is a function of the output capacitance. The
ADP3309 is stable with a wide range of capacitor values, types,
and ESR (anyCAP). A capacitor as low as 0.47 μF is all that is
needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3309 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Input Bypass Capacitor: An input bypass capacitor is not
required. However, for applications where the input source is
high impedance or far from the input pin, a bypass capacitor is
recommended. Connecting a 0.47 μF capacitor from the input
pin (Pin 1) to ground reduces the circuits sensitivity to PC
board layout. If a bigger output capacitor is used, the input
capacitor must be 1 μF minimum.
THERMAL OVERLOAD PROTECTION
The ADP3309 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions (that is, high ambient temperature
and power dissipation) where die temperature starts to rise
above 165°C, the output current is reduced until the die
temperature has dropped to a safe level. The output current is
restored when the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures do not exceed 125°C.
CALCULATING JUNCTION TEMPERATURE
Device power dissipation is calculated as follows:
P
D
= (V
IN
– V
OUT
) I
LOAD
+ (V
IN
) I
GND
where:
I
LOAD
is the load current.
I
GND
is the ground current.
V
IN
is the input voltage.
V
OUT
is the output voltage.
Assuming I
LOAD
= 100 mA, I
GND
= 2 mA, V
IN
= 5.0 V, and
V
OUT
= 3.3 V, device power dissipation is
P
D
= (5.0 − 3.3) 100 mA + 5.0 × 2 mA = 180 mW
ΔT = T
J
– T
A
= P
D
× θ
JA
= 0.18 × 190 = 34.2°C
With a maximum junction temperature of 125°C, this yields a
maximum ambient temperature of ~90°C.
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATION
Surface-mount components rely on the conductive traces or
pads to transfer heat away from the device. Appropriate PC
board layout techniques should be used to remove heat from
the immediate vicinity of the package.
The following general guidelines will be helpful when designing
a board layout:
1. PC board traces with larger cross section areas remove
more heat. For optimum results, use PC boards with
thicker copper and/or wider traces.
2. Increase the surface area exposed to open air so heat can be
removed by convection or forced air flow.
3. Do not use solder mask or silk screen on the heat
dissipating traces because it increases the junction to
ambient thermal resistance of the package.
SHUTDOWN MODE
Applying a TTL high signal to the shutdown pin or tying it to
the input pin turns the output on. Pulling the shutdown pin
down to a TTL low signal or tying it to ground turns the output
off. In shutdown mode, quiescent current is reduced to less
than 1 μA.
ERROR FLAG DROPOUT DETECTOR
The ADP3309 maintains its output voltage over a wide range of
load, input voltage, and temperature conditions. If the output is
about to lose regulation, for example, by reducing the supply
voltage below the combined regulated output and dropout
voltages, the
ERR
pin will be activated. The
ERR
output is an
open collector that will be driven low.
Once set, the
ERR
or flag’s hysteresis keeps the output low until
a small margin of operating range is restored either by raising
the supply voltage or reducing the load.
ADP3309
Rev. C | Page 11 of 12
APPLICATION CIRCUITS
CROSSOVER SWITCH
The circuit in Figure 23 shows that two ADP3309s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital
input. Output voltages can be any combination of voltages from
the
Ordering Guide of the data sheet.
+
+
ADP3309-2.7
ADP3309-3.3
IN OUT
SD
IN OUT
SD
GND
GND
V
IN
= 4V TO 12V
4V
0V
OUTPUT SELECT
C1
1µF
C2
0.47µF
V
OUT
= 2.7V/3.3V
00141-023
Figure 23. Crossover Switch
HIGHER OUTPUT CURRENT
The ADP3309 can source up to 100 mA without any heat sink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in
Figure 24, to increase the
output current to 1 A.
+
ADP3309-3.3
IN
OUT
SD
GND
V
IN
= 4V TO 8V
C1
47µF
C2
10µF
V
OUT
= 3.3V @ 1A
ERR
R1
50
MJE253*
*AAVID531002 HE AT SINK IS USED
00141-024
Figure 24. Higher Output Current Linear Regulator
CONSTANT DROPOUT POST REGULATOR
The circuit in Figure 25 provides high precision with low
dropout for any regulated output voltage. It significantly
reduces the ripple from a switching regulator while providing a
constant dropout voltage, which limits the power dissipation of
the LDO to 30 mW. The ADP3000 used in this circuit is a
switching regulator in the step-up configuration.
+
ADP3309-3.3
IN OUT
SD
GND
V
IN
= 2.5V TO 3.5V
C3
2.2µF
V
OUT
= 3.3V @ 100mA
R1
120
C1
100µF
10V
L1
6.8µF
D1
1N5817
ADP3000-ADJ
I
LIM
V
IN
SW1
FB
SW2GND
C2
100µF
10V
Q1
2N3906
R2
30.1k
1%
R3
124k
1%
Q2
2N3906
R4
274k
00141-025
Figure 25. Constant Dropout Post Regulator

ADP3309ARTZ-2.5RL7

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Linear Voltage Regulators 100mA LDO
Lifecycle:
New from this manufacturer.
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