74LVC_LVCH8T245_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 21 March 2013 3 of 28
NXP Semiconductors 74LVC8T245-Q100; 74LVCH8T245-Q100
8-bit dual supply translating transceiver; 3-state
4. Functional diagram
Fig 1. Logic symbol
001aai472
OE
DIR
V
CC(A)
V
CC(B)
22
2
3
A1 A2 A3 A4 A5 A6 A7 A8
B1 B2 B3 B4 B5 B6 B7 B8
45678910
21 20 19 18 17 16 15 14
Fig 2. Logic diagram (one channel)
001aai473
to other seven channels
DIR
A1
V
CC(A)
V
CC(B)
OE
B1
74LVC_LVCH8T245_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 21 March 2013 4 of 28
NXP Semiconductors 74LVC8T245-Q100; 74LVCH8T245-Q100
8-bit dual supply translating transceiver; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
[1] All GND pins must be connected to ground (0 V).
(1) This is not a supply pin, the substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered the solder land should remain
floating or be connected to GND.
Fig 3. Pin configuration SOT355-1 (TSSOP24) Fig 4. Pin configuration SOT815-1 (DHVQFN24)
/9&74
/9&+74
9
&&$
9
&&%
',5 9
&&%
$ 2
(
$ %
$ %
$ %
$ %
$ %
$ %
$ %
*1'
%
*1' *1'
DDD















/9&+74
%
$
*1'
%
$ %
$ %
$ %
$ %
$ %
$ %
$ 2(
',5 9
*1'
*1'
9
&&$
9
&&%
 
 











*1'

Table 2. Pin description
Symbol Pin Description
V
CC(A)
1 supply voltage A (An inputs/outputs, OE and DIR inputs are referenced to V
CC(A)
)
DIR 2 direction control
A1 to A8 3, 4, 5, 6, 7, 8, 9, 10 data input or output
GND
[1]
11 ground (0 V)
GND
[1]
12 ground (0 V)
GND
[1]
13 ground (0 V)
B1 to B8 21, 20, 19, 18, 17, 16, 15, 14 data input or output
OE
22 output enable input (active LOW)
V
CC(B)
23 supply voltage B (Bn inputs/outputs are referenced to V
CC(B)
)
V
CC(B)
24 supply voltage B (Bn inputs/outputs are referenced to V
CC(B)
)
74LVC_LVCH8T245_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 21 March 2013 5 of 28
NXP Semiconductors 74LVC8T245-Q100; 74LVCH8T245-Q100
8-bit dual supply translating transceiver; 3-state
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
[2] The An inputs/outputs, DIR and OE
input circuit is referenced to V
CC(A)
; The Bn inputs/outputs circuit is referenced to V
CC(B)
.
[3] If at least one of V
CC(A)
or V
CC(B)
is at GND level, the device goes into suspend mode.
7. Limiting values
[1] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] V
CCO
is the supply voltage associated with the output port.
[3] V
CCO
+ 0.5 V should not exceed 6.5 V.
[4] For TSSOP24 package: P
tot
derates linearly at 5.5 mW/K above 60 C.
For DHVQFN24 package: P
tot
derates linearly at 4.5 mW/K above 60 C.
Table 3. Function table
[1]
Supply voltage Input Input/output
[3]
V
CC(A)
, V
CC(B)
OE
[2]
DIR
[2]
An
[2]
Bn
[2]
1.2 V to 5.5 V L L An = Bn input
1.2 V to 5.5 V L H input Bn = An
1.2 V to 5.5 V H X Z Z
GND
[3]
XXZZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC(A)
supply voltage A 0.5 +6.5 V
V
CC(B)
supply voltage B 0.5 +6.5 V
I
IK
input clamping current V
I
<0V 50 - mA
V
I
input voltage
[1]
0.5 +6.5 V
I
OK
output clamping current V
O
<0V 50 - mA
V
O
output voltage Active mode
[1][2][3]
0.5 V
CCO
+0.5 V
Suspend or 3-state mode
[1]
0.5 +6.5 V
I
O
output current V
O
=0VtoV
CCO
[2]
- 50 mA
I
CC
supply current I
CC(A)
or I
CC(B)
; per V
CC
pin - 100 mA
I
GND
ground current per GND pin 100 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 C to +125 C
[4]
-500mW

74LVC8T245PW-Q100J

Mfr. #:
Manufacturer:
Nexperia
Description:
Bus Transceivers 74LVC8T245PW-Q100/TSSOP24/REEL
Lifecycle:
New from this manufacturer.
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