IDT
/ ICS
SAS/SATA CLOCK GENERATOR 13 ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the ICS843241.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS843241 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Power (core)
MAX
= V
CC_MAX
* I
EE_MAX
= 3.465V * 77mA = 266.8mW
Power (outputs)
MAX
= 30mW/Loaded Output pair
Total Power
_MAX
(3.465V, with all outputs switching) = 266.8mW + 30mW = 296.8mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
TM
devices is 125°C.
The equation for Tj is as follows: Tj = θ
JA
* Pd_total + T
A
Tj = Junction Temperature
θ
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
JA
must be used. Assuming no air
flow and a multi-layer board, the appropriate value is 96°C/W per Table 7B below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.297W * 96°C/W = 97.6°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board.
TABLE 7B. θ
JA
VS. AIR FLOW TABLE FOR 8 LEAD SOIC
TABLE 7A. θ
JA
VS. AIR FLOW TABLE FOR 16 LEAD TSSOP
θθ
θθ
θ
JA
by Velocity (Meters per Second)
0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 92.4°C/W 88.0°C/W 85.9°C/W
θθ
θθ
θ
JA
by Velocity (Linear Feet per Minute)
0 200 500
Multi-Layer PCB, JEDEC Standard Test Boards 96°C/W 87°C/W 82°C/W
IDT
/ ICS
SAS/SATA CLOCK GENERATOR 14 ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 6.
To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination
voltage of V
CC
- 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 0.9V
(V
CC_MAX
- V
OH_MAX
)
= 0.9V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
– 1.7V
(V
CC_MAX
- V
OL_MAX
)
= 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CC_MAX
- V
OH_MAX
) = [(2V - (V
CC_MAX
- V
OH_MAX
))
/R
L
] * (V
CC_MAX
- V
OH_MAX
) =
[(2V - 0.9V)/50Ω] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
- 2V))/R
L
] * (V
CCO_MAX
- V
OL_MAX
) = [(2V - (V
CC_MAX
- V
OL_MAX
))
/R
L
] * (V
CC_MAX
- V
OL_MAX
) =
[(2V - 1.7V)/50Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
FIGURE 6. LVPECL DRIVER CIRCUIT AND TERMINATION
V
OUT
V
CC
V
CC
- 2V
Q1
RL
50Ω
IDT
/ ICS
SAS/SATA CLOCK GENERATOR 15 ICS843241BG REV. A AUGUST 20, 2008
ICS843241
FEMTOCLOCKS™ SAS/SATA CLOCK GENERATOR
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS843241 is: 2986
TABLE 8A. θ
JA
VS. AIR FLOW TABLE FOR 8 LEAD SOIC
TABLE 8B. θ
JA
VS. AIR FLOW TABLE FOR 16 LEAD TSSOP
θθ
θθ
θ
JA
by Velocity (Meters per Second)
0 1 2.5
Multi-Layer PCB, JEDEC Standard Test Boards 92.4°C/W 88.0°C/W 85.9°C/W
θθ
θθ
θ
JA
by Velocity (Linear Feet per Minute)
0 200 500
Multi-Layer PCB, JEDEC Standard Test Boards 96°C/W 87°C/W 82°C/W

843241BGLF

Mfr. #:
Manufacturer:
Description:
IC CLOCK GENERATOR 8SOIC
Lifecycle:
New from this manufacturer.
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