NB2305AI1DTR2G

© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 11
1 Publication Order Number:
NB2305A/D
NB2305A
3.3 V Zero Delay
Clock Buffer
The NB2305A is a versatile, 3.3 V zero delay buffer designed to
distribute high−speed clocks. It accepts one reference input and drives
out five low−skew clocks. It is available in a 8 pin package.
The −1H version of the NB2305A operates at up to 133 MHz, and
has higher drive than the −1 devices. All parts have on−chip PLLs that
lock to an input clock on the REF pin. The PLL feedback is on−chip
and is obtained from the CLKOUT pad.
Multiple NB2305A devices can accept the same input clock and
distribute it. In this case the skew between the outputs of the two
devices is guaranteed to be less than 700 ps.
All outputs have less than 200 ps of cycle−to−cycle jitter. The input
and output propagation delay is guaranteed to be less than 350 ps, and
the output to output skew is guaranteed to be less than 250 ps.
The NB2305A is available in two different configurations, as shown
in the ordering information table. The NB2305AI is the base part. The
NB2305AI1H is the high drive version of the −1 and its rise and fall
times are much faster than −1 part.
Features
15 MHz to 133 MHz Operating Range, Compatible with CPU and
PCI Bus Frequencies
Zero Input − Output Propagation Delay
Multiple Low−Skew Outputs
Output−Output Skew Less than 250 ps
Device−Device Skew Less than 700 ps
One Input Drives 5 Outputs
Less than 200 ps Cycle−to−Cycle Jitter is Compatible with PentiumR
Based Systems
Accepts Spread Spectrum Clock at the Input
Available in 8 Pin, 150 mil SOIC Package and 8 Pin TSSOP 4.4 mm
3.3 V Operation, Advanced 0.35 CMOS Technology
Guaranteed Across Commercial and Industrial Temperature Ranges
These are Pb−Free Devices
MARKING
DIAGRAMS*
XXXX = Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
1
8
SOIC−8
D SUFFIX
CASE 751
See detailed ordering, marking and shipping information in the
package dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
www.
onsemi.com
1
8
TSSOP−8
DT SUFFIX
CASE 948S
XXXX
ALYW
G
1
8
1
8
XXX
YWW
A G
NB2305A
www.onsemi.com
2
Figure 1. Block Diagram
REF
PLL
CLKOUT
CLK1
CLK2
CLK3
CLK4
Figure 2. Pin Configuration
V
DD
1
2
3
4
8
7
6
5
REF
CLK2
CLK1
GND
CLKOUT
CLK4
CLK3
NB2305A
Table 1. PIN DESCRIPTION
Pin # Pin Name Description
1 REF (Note1) Input reference frequency, 5 V tolerant input.
2 CLK2 (Note 2) Buffered clock output.
3 CLK1 (Note 2) Buffered clock output.
4 GND Ground.
5 CLK3 (Note 2) Buffered clock output.
6 V
DD
3.3 V supply.
7 CLK4 (Note 2) Buffered clock output.
8 CLKOUT (Note 2) Buffered clock output, internal feedback on this pin.
1. Weak pulldown.
2. Weak pulldown on all outputs.
NB2305A
www.onsemi.com
3
Table 2. MAXIMUM RATINGS
Parameter Min Max Unit
Supply Voltage to Ground Potential −0.5 +7.0 V
DC Input Voltage (Except REF) −0.5 V
DD
+ 0.5 V
DC Input Voltage (REF) −0.5 7.0 V
Storage Temperature −65 +150 °C
Maximum Soldering Temperature (10 sec) 260 °C
Junction Temperature 150 °C
Static Discharge Voltage (per MIL−STD−883, Method 3015) >2000 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. RECOMMENDED OPERATING CONDITIONS FOR INDUSTRIAL TEMPERATURE DEVICES
Parameter Description Min Max Unit
V
DD
Supply Voltage 3.0 3.6 V
T
A
Operating Temperature (Ambient Temperature) Industrial
Commercial
−40
0
85
70
°C
C
L
Load Capacitance, below 100 MHz 30 pF
C
L
Load Capacitance, from 100 MHz to 133 MHz 10 pF
C
IN
Input Capacitance 7 pF
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS V
CC
= 3.0 V to 3.6 V, GND = 0 V, T
A
= −40°C to +85°C
Parameter
Description Test Conditions Min Max Unit
V
IL
Input LOW Voltage (Note 3) 0.8 V
V
IH
Input HIGH Voltage (Note 3) 2.0 V
I
IL
Input LOW Current V
IN
= 0 V 50
A
I
IH
Input HIGH Current V
IN
= V
DD
100
A
V
OL
Output LOW Voltage I
OL
= 8 mA (−1)
I
OL
= 12 mA (−1H)
0.4 V
V
OH
Output HIGH Voltage I
OH
= −8 mA (−1)
I
OH
= −12 mA (−1H)
2.4 V
I
DD
Supply Current (Commercial Temp) Unloaded outputs at 66.67 MHz,
Select inputs at V
DD
34 mA
I
DD
Supply Current (Industrial Temp) Unloaded outputs at 100 MHz
66.67 MHz
33 MHz
Select inputs at V
DD
or GND, at Room
Temp
50
34
19
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. REF input has a threshold voltage of V
DD
/2.

NB2305AI1DTR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Phase Locked Loops - PLL 3.3V Five Output Zero Delay Buffer
Lifecycle:
New from this manufacturer.
Delivery:
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