REV. D
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AD7713
LC
2
MOS
Loop-Powered Signal Conditioning ADC
FEATURES
Charge Balancing ADC
24 Bits No Missing Codes
0.0015% Nonlinearity
3-Channel Programmable Gain Front End
Gains from 1 to 128
2 Differential Inputs
1 Single-Ended High Voltage Input
Low-Pass Filter with Programmable Filter Cutoffs
Ability to Read/Write Calibration Coefficients
Bidirectional Microcontroller Serial Interface
Single-Supply Operation
Low Power (3.5 mW typ) with Power-Down Mode
(150 W typ)
APPLICATIONS
Loop Powered (Smart) Transmitters
RTD Transducers
Process Control
Portable Industrial Instruments
CMOS construction ensures low power dissipation, and a hard-
ware programmable power-down mode reduces the standby
power consumption to only 150 µW typical. The part is available
in a 24-lead, 0.3 inch wide, PDIP and CERDIP as well as a 24-
lead SOIC package.
PRODUCT HIGHLIGHTS
1. The AD7713 consumes less than 1 mA in total supply current,
making it ideal for use in loop-powered systems.
2. The two programmable gain channels allow the AD7713 to
accept input signals directly from a transducer removing a
considerable amount of signal conditioning. To maximize
the flexibility of the part, the high level analog input accepts
4 V
REF
signals. On-chip current sources provide excitation
for 3-wire and 4-wire RTD configurations.
3. No missing codes ensures true, usable, 24-bit dynamic range
coupled with excellent ±0.0015% accuracy. The effects of
temperature drift are eliminated by on-chip self-calibration,
which removes zero-scale and full-scale errors.
4. The AD7713 is ideal for microcontroller or DSP processor
applications with an on-chip control register, which allows
control over filter cutoff, input gain, signal polarity, and
calibration modes. The AD7713 allows the user to read and
write the on-chip calibration registers.
GENERAL DESCRIPTION
The AD7713 is a complete analog front end for low frequency
measurement applications. The device accepts low level signals
directly from a transducer or high level signals (4 V
REF
) and
outputs a serial digital word. It employs - conversion
technique to realize up to 24 bits of no missing codes
performance. The input signal is applied to a proprietary pro-
grammable gain front end based around an analog modulator.
The modulator output is processed by an on-chip digital filter.
The first notch of this digital filter can be programmed via the
on-chip control register, allowing adjustment of the filter cutoff
and settling time.
The part features two differential analog inputs and one single-
ended high level analog input as well as a differential reference
input. It can be operated from a single supply (AV
DD
and DV
DD
at 5 V). The part provides two current sources that can be used
to provide excitation in 3-wire and 4-wire RTD configurations.
The AD7713 thus performs all signal conditioning and conver-
sion for a single-, dual- or three-channel system.
The AD7713 is ideal for use in smart, microcontroller-based
systems. Gain settings, signal polarity, and RTD current control
can be configured in software using the bidirectional serial port.
The AD7713 contains self-calibration, system calibration, and
background calibration options and also allows the user to read
and to write the on-chip calibration registers.
FUNCTIONAL BLOCK DIAGRAM
CHARGING BALANCING ADC
AUTO-ZEROED
-
MODULATOR
DIGITAL
FILTER
CLOCK
GENERATION
AD7713
AGND DGND
MCLK
OUT
MCLK
IN
AIN1(+)
AIN1(–)
AIN2(+)
REF
IN(+)
AV
DD
DV
DD
AV
DD
1A
A = 1 – 128
STANDBY
AIN2(–)
REF
IN(–)
SYNC
RTD2
RTD1
PGA
AV
DD
200A
200A
MUX
SERIAL INTERFACE
CONTROL
REGISTER
OUTPUT
REGISTER
MODE SDATA A0DRDYTFSRFS SCLK
AIN3
INPUT
SCALING
AD7713* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DOCUMENTATION
Application Notes
AN-202: An IC Amplifier User’s Guide to Decoupling,
Grounding, and Making Things Go Right for a Change
AN-283: Sigma-Delta ADCs and DACs
AN-311: How to Reliably Protect CMOS Circuits Against
Power Supply Overvoltaging
AN-348: Avoiding Passive-Component Pitfalls
AN-388: Using Sigma-Delta Converters-Part 1
AN-389: Using Sigma-Delta Converters-Part 2
AN-397: Electrically Induced Damage to Standard Linear
Integrated Circuits:
AN-406: Using the AD771X Family of 24-Bit Sigma-Delta
A/D Converters
AN-553: Adjusting the Calibration Coefficients on the
AD771X Family of ADCs
AN-607: Selecting a Low Bandwidth (<15 kSPS) Sigma-
Delta ADC
AN-615: Peak-to-Peak Resolution Versus Effective
Resolution
Data Sheet
AD7713: LC
2
MOS, Loop-Powered Signal Conditioning
ADC Data Sheet
TOOLS AND SIMULATIONS
Sigma-Delta ADC Tutorial
REFERENCE MATERIALS
Technical Articles
Delta-Sigma Rocks RF, As ADC Designers Jump On Jitter
MS-2210: Designing Power Supplies for High Speed ADC
Part 1: Circuit Suggestions Using Features and
Functionality of New Sigma-Delta ADCs
Part 2: Circuit Suggestions Using Features and
Functionality of New Sigma-Delta ADCs
DESIGN RESOURCES
AD7713 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD7713 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
DOCUMENT FEEDBACK
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REV. D–2–
AD7713–SPECIFICATIONS
Parameter A, S Versions
1
Unit Conditions/Comments
STATIC PERFORMANCE
No Missing Codes 24 Bits min Guaranteed by Design.
For Filter Notches 12 Hz.
22 Bits min For Filter Notch = 20 Hz.
18 Bits min For Filter Notch = 50 Hz.
15 Bits min For Filter Notch = 100 Hz.
12 Bits min For Filter Notch = 200 Hz.
Output Noise See Tables I and II Depends on Filter Cutoffs and Selected Gain.
Integral Nonlinearity ±0.0015 % of FSR max Filter Notches 12 Hz; Typically ±0.0003%.
Positive Full-Scale Error
2, 3, 4
Full-Scale Drift
5
1 µV/°C typ For Gains of 1, 2.
0.3 µV/°C typ For Gains of 4, 8, 16, 32, 64, 128.
Unipolar Offset Error
2, 4
Unipolar Offset Drift
5
0.5 µV/°C typ For Gains of 1, 2.
0.25 µV/°C typ For Gains of 4, 8, 16, 32, 64, 128.
Bipolar Zero Error
2, 4
Bipolar Zero Drift
5
0.5 µV/°C typ For Gains of 1, 2.
0.25 µV/°C typ For Gains of 4, 8, 16, 32, 64, 128.
Gain Drift 2 ppm/°C typ
Bipolar Negative Full-Scale Error
2
±0.0004 % of FSR max Typically ±0.0006%.
Bipolar Negative Full-Scale Drift
5
1 µV/°C typ For Gains of 1, 2.
0.3 µV/°C typ For Gains of 4, 8, 16, 32, 64, 128.
ANALOG INPUTS
Input Sampling Rate, f
S
See Table III
Normal-Mode 50 Hz Rejection
6
100 dB min For Filter Notches of 2 Hz, 5 Hz, 10 Hz,
25 Hz, 50 Hz, ±0.02 f
NOTCH
.
Normal-Mode 60 Hz Rejection
6
100 dB min For Filter Notches of 2 Hz, 6 Hz, 10 Hz,
30 Hz, 60 Hz, ±0.02 f
NOTCH
.
AIN1, AIN2
7
Input Voltage Range
8
For Normal Operation.
Depends on Gain Selected.
0 to +V
REF
9
V max Unipolar Input Range
(B/U Bit of Control Register = 1).
±V
REF
V max Bipolar Input Range
(B/U Bit of Control Register = 0).
Common-Mode Rejection (CMR) 100 dB min At dc and AV
DD
= 5 V.
90 dB min At dc and AV
DD
= 10 V.
Common-Mode 50 Hz Rejection
6
150 dB min For Filter Notches of 2 Hz, 5 Hz, 10 Hz,
25 Hz, 50 Hz, ±0.02 f
NOTCH.
Common-Mode 60 Hz Rejection
6
150 dB min For Filter Notches of 2 Hz, 6 Hz, 10 Hz,
30 Hz, 60 Hz, ±0.02 f
NOTCH.
Common-Mode Voltage Range
10
AGND to AV
DD
V min to V max
DC Input Leakage Current @ 25°C10 pA max
T
MIN
to T
MAX
1nA max
Sampling Capacitance
6
20 pF max
AIN3
Input Voltage Range 0 to + 4 V
REF
V max For Normal Operation. Depends on Gain
Selected.
Gain Error
11
±0.05 % typ Additional Error Contributed by Resistor
Attenuator.
Gain Drift 1 ppm/°C typ Additional Drift Contributed by Resistor
Attenuator.
Offset Error
11
4 mV max Additional Error Contributed by Resistor
Attenuator.
Input Impedance 30 k min
(AV
DD
= 5 V 5%; DV
DD
= 5 V 5%; REF IN(+) = 2.5 V; REF IN(–) = AGND;
MCLK IN = 2 MHz, unless otherwise noted. All specifications T
MIN
to T
MAX
, unless otherwise noted.)

AD7713ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC CMOS 24B w/ Matched RTD Crnt Source
Lifecycle:
New from this manufacturer.
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