MAX4800/MAX4801/MAX4802
Low-Charge Injection,
8-Channel, High-Voltage Analog Switches
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When V
NN
is connected to GND (single-supply applica-
tions), the devices operate with V
PP
up to +200V. The
V
PP
and V
NN
high-voltage supplies are not required to
be symmetrical, but the voltage difference V
PP
- V
NN
must not exceed 200V.
Bleed Resistors (MAX4802)
The MAX4802 features integrated 35kΩ bleed resistors
to discharge capacitive loads such as piezoelectric
transducers. Each analog switch terminal is connected
to RGND with a bleed resistor.
Serial Interface
The MAX4800/MAX4801/MAX4802 are controlled by a
serial interface with an 8-bit serial shift register and
transparent latch. Each of the eight data bits controls a
single analog switch (see Table 1). Data on DIN is
clocked with the most significant bit (MSB) first into the
shift register on the rising edge of CLK. Data is clocked
out of the shift register onto DOUT on the rising edge of
CLK. DOUT reflects the status of DIN, delayed by eight
clock cycles (see Figures 1 and 2).
Latch Enable (
LE
)
Drive LE logic-low to change the contents of the latch
and update the state of the high-voltage switches
(Figure 2). Drive LE logic-high to freeze the contents of
the latch and prevent changes to the switch states. To
reduce noise due to clock feedthrough, drive LE logic-
high while data is clocked into the shift register. After
the data shift register is loaded with valid data, pulse
LE logic-low to load the contents of the shift register
into the latch.
Latch Clear (CLR)
The MAX4800/MAX4801/MAX4802 feature a latch clear
input. Drive CLR logic-high to reset the contents of the
latch to zero and open all switches. CLR does not
affect the contents of the data shift register. Pulse LE
logic-low to reload the contents of the shift register into
the latch.
Power-On Reset
The MAX4800/MAX4801/MAX4802 feature a power-on
reset circuit to ensure all switches are open at power-
on. The internal 8-bit serial shift register and latch are
set to zero on power-up.
