Data Sheet ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447
Rev. E | Page 21 of 25
Low Power Operating Mode
The ADuM1440/ADuM1441/ADuM1442/ADuM1445/
ADuM1446/ADuM1447 allow the refresh and watchdog
functions to be disabled by pulling EN
1
and EN
2
to logic high for
the lowest power consumption. These control pins must be set to
the same value on each side of the component for proper operation.
In this mode, the current consumption of the chip drops to the
microamp range. However, be careful when using this mode
because dc correctness is no longer guaranteed at startup. For
example, if the following sequence of events occurs:
1. Power is applied to Side 1
2. A high level is asserted on the V
IA
input
3. Power is applied to Side 2
The high on V
IA
is not automatically transferred to the Side 2
V
OA
, and there can be a level mismatch that is not corrected until a
transition occurs at V
IA
. After power is stable on each side and a
transition occurs on the input of the channel, that channel’s input
and output state is correctly matched. This contingency can be
addressed in several ways, such as sending dummy data, or toggling
refresh on for a short period to force synchronization after turn on.
Recommended Input Voltage for Low Power Operation
The ADuM1440/ADuM1441/ADuM1442/ADuM1445/
ADuM1446/ADuM1447 implement Schmitt trigger input buffers
so that the devices operate cleanly in low data rate or noisy
environments. Schmitt triggers allow a small amount of shoot
through current when their input voltage is not approximate to
either V
DDx
or GND
x
levels. This is because the two transistors are
both slightly on when input voltages are in the middle of the supply
range. For many digital devices, this leakage is not a large portion
of the total supply current and may not be noticed; however, in
the ultralow power ADuM1440/ADuM1441/ADuM1442/
ADuM1445/ADuM1446/ADuM1447, this leakage can be larger
than the total operating current of the device and cannot be
ignored.
To achieve optimum power consumption with the ADuM1440/
ADuM1441/ADuM1442/ADuM1445/ADuM1446/ ADuM1447,
always drive the inputs as near to V
DDx
or GND
x
levels as possible.
Figure 19 and Figure 20 illustrate the shoot through leakage of
an input; therefore, whereas the logic thresholds of the input are
standard CMOS levels, optimum power performance is achieved
when the input logic levels are driven within 0.5 V of either
V
DDx
or GND
x
levels.
MAGNETIC FIELD IMMUNITY
The magnetic field immunity of the ADuM1440/ADuM1441/
ADuM1442/ADuM1445/ADuM1446/ADuM1447 is determined
by the changing magnetic field, which induces a voltage in the
receiving coil of the transformer large enough to either falsely
set or reset the decoder. The following analysis defines the
conditions under which this can occur. The 3.3 V operating
condition of the ADuM1440/ADuM1441/ADuM1442/
ADuM1445/ADuM1446/ADuM1447 is examined because it
represents the most typical mode of operation.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V, thus
establishing a 0.5 V margin in which induced voltages can be
tolerated. The voltage induced across the receiving coil is given by
V = (−dβ/dt) ∑ π r
n
2
; n = 1, 2, … , N
where:
β is magnetic flux density (gauss).
r
n
is the radius of the n
th
turn in the receiving coil (cm).
N is the number of turns in the receiving coil.
Given the geometry of the receiving coil in the ADuM1440/
ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447
and an imposed requirement that the induced voltage be, at most,
50% of the 0.5 V margin at the decoder, a maximum allowable
magnetic field at a given frequency can be calculated. The result
is shown in Figure 32.
1000
1k
100M10k
MAXIMUM ALLOWABLE MAGNETIC FLUX (kgauss)
100k 1M
10M
MAGNETIC FIELD FREQUENCY (Hz)
100
10
1
0.1
0.01
0.001
11845-020
Figure 32. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.5 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurred during a transmitted pulse
(and was of the worst-case polarity), it would reduce the received
pulse from >1.0 V to 0.75 V, still well above the 0.5 V sensing
threshold of the decoder.
The preceding magnetic flux density values correspond to specific
current magnitudes at given distances from the ADuM1440/
ADuM1441/ADuM1442/ADuM1445/ADuM1446/ADuM1447
transformers. Figure 33 shows these allowable current magnitudes
as a function of frequency for selected distances. As shown, the
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/
ADuM1447 are extremely immune and can be affected only by
extremely large currents operating at a high frequency very near
to the component. For the 1 MHz example noted previously, a
1.2 kA current would have to be placed 5 mm away from the
ADuM1440/ADuM1441/ADuM1442/ADuM1445/ADuM1446/
ADuM1447 to affect the operation of the component.
