LTC4228-1/LTC4228-2
7
422812f
pin FuncTions
INTV
CC
: Internal 5V Supply Decoupling Output. This pin
must have a 0.1µF or larger capacitor. An external load of
less than 500µA can be connected at this pin.
ON1, ON2: On Control Input. A rising edge above 1.235V
turns on the external Hot Swap MOSFET and a falling edge
below 1.155V turns it off. Connect this pin to an external
resistive divider from IN or SENSE
+
to monitor the supply
undervoltage condition. Pulling the ON pin below 0.6V
resets the electronic circuit breaker.
OUT1, OUT2: Output Voltage Sense and Hot Swap’s MOS-
FET Gate Drive Return. Connect this pin to the output side
of the external MOSFET. The voltage sensed at this pin is
used to control DGATE. The gate fast pull-down current
returns through this pin when HGATE is discharged.
PWRGD1, PWRGD2: Power Status Output. Open-drain
output that is normally pulled high by a 10µA current
source to a diode below INTV
CC
. It may be pulled above
INTV
CC
using an external pull-up. It pulls low when the
MOSFET gate drive between HGATE and OUT exceeds
the gate-to-source voltage of 4.2V. Leave open if unused.
SENSE1
+
, SENSE2
+
: Positive Current Sense Input. Connect
this pin to the output of the external ideal diode MOSFET
and input of the current sense resistor. The voltage sensed
at this pin is used for monitoring the current limit. This
pin has an undervoltage lockout threshold of 1.9V that
will turn off the Hot Swap MOSFET.
SENSE1
, SENSE2
: Negative Current Sense Input. Con-
nect this pin to the output of the current sense resistor.
The current limit circuit controls HGATE to limit the voltage
between SENSE
+
and SENSE
to 65mV. A circuit breaker
trips when the sense voltage exceeds 50mV for more than
a fault filter delay configured at the TMR pin.
STATUS1, STATUS2: Diode MOSFET Status Output.
Open-drain output that is normally pulled high by a 10µA
current source to a diode below INTV
CC
. It may be pulled
above INTV
CC
using an external pull-up. It pulls low when
the MOSFET gate drive between DGATE and IN exceeds
the gate-to-source voltage of 0.7V. Leave open if unused.
TMR1, TMR2: Timer Capacitor Terminal. Connect a capaci-
tor between this pin and ground to set a 12ms/µF duration
for current limit before the external Hot Swap MOSFET
is turned off. The duration of the off time is 617ms/µF,
resulting in a 2% duty cycle.
LTC4228-1/LTC4228-2
8
422812f
block DiagraM
+
+
A1
+
GA1
HGATE1
IN1
CPO1
DGATE1
OUT1
ON1
HGATE2
IN2
CPO2
DGATE2
OUT2
65mV 50mV 65mV50mV
SENSE1
+
SENSE1
ECB1
SENSE2
SENSE2
+
10µA
+
+
25mV
HGATE1 ON
1.235V
0.6V
1.235V
0.6V
10µA
INTV
CC
10µA
INTV
CC
CP1
25mV
2.2V
+
100µA
INTV
CC
12V
INTV
CC
10µA
100µA
+
A2
+
INTV
CC
INTV
CC
UV3
+
+
+
CHARGE
PUMP 1
f = 2MHz
GATE
DRIVER 1
GATE
DRIVER 2
CHARGE
PUMP 2
f = 2MHz
5V LDO
GA2
+
100µA
INTV
CC
2µA
+
SENSE1
+
1.9V
UV1
+
FAULT1 RESET
CP2
CP5
+
1.235V
0.2V
CP7
+
CP8
100µA
2µA
1.235V
0.2V
CP9
CP10
+
1.235V
CARD1 PRESENCE DETECT
HGATE2 ON
FAULT2 RESET
LOGIC
CARD2 PRESENCE DETECT
+
TMR1
*UFD PACKAGE ONLY
EN1
ON2
CP6
CP3
CP4
TMR2
422812 BD
EN2
INTV
CC
+
+
+
+
1.235V
+
SENSE2
+
1.9V
UV2
+
+
ECB2
10µA
INTV
CC
10µA
INTV
CC
GND
STATUS1
FAULT1
PWRGD1
EXPOSED PAD*
STATUS2
FAULT2
PWRGD2
INTV
CC
INTV
CC
10µA10µA
12V
12V
12V
10µA
INTV
CC
INTV
CC
10µA
DGATE2
IN2
0.7V
STAT2
+
+
4.2V
PG2
+
HGATE2
+
0.7V
DGATE1
IN1
STAT1
+
+
HGATE1
PG1
4.2V
+
+
LTC4228-1/LTC4228-2
9
422812f
operaTion
The LTC4228 functions as an ideal diode with inrush cur-
rent limiting and overcurrent protection by controlling two
external N-channel MOSFETs (M
D
and M
H
) on a supply
path. This allows boards to be safely inserted and removed
in systems with a backplane powered by redundant sup-
plies, such as µTCA applications. The LTC4228 has two
separate ideal diode and Hot Swap controllers, each
providing independent control for the two input supplies.
When the LTC4228 is first powered up, the gates of the
external MOSFETs are held low, keeping them off. The gate
drive amplifier (GA1, GA2) monitors the voltage between the
IN and OUT pins and drives the DGATE pin. The amplifier
quickly pulls up the DGATE pin, turning on the MOSFET
for ideal diode control, when it senses a large forward
voltage drop. The stored charge in an external capacitor
connected between the CPO and IN pins provides the
charge needed to quickly turn on the ideal diode MOSFET.
An internal charge pump charges up this capacitor at device
power-up. The DGATE pin sources current from the CPO
pin and sinks current into the IN and GND pins. When the
DGATE to IN voltage exceeds 0.7V, the STATUS pin pulls
low to indicate that the ideal diode MOSFET is turned on.
Pulling the ON pin high and the EN pin low initiates a
100ms debounce timing cycle. After this timing cycle,
a 10µA current source from the charge pump ramps up
the HGATE pin. When the Hot Swap MOSFET turns on,
the inrush current is limited at a level set by an external
sense resistor (R
S
) connected between the SENSE
+
and
SENSE
pins. An active current limit amplifier (A1, A2)
servos the gate of the MOSFET to 65mV across the current
sense resistor. Inrush current can be further reduced, if
desired, by adding a capacitor from HGATE to GND. When
the MOSFET s gate overdrive (HGATE to OUT voltage)
exceeds 4.2V, the PWRGD pin pulls low.
When both of the MOSFETs are turned on, the gate drive
amplifier controls DGATE to servo the forward voltage
drop (V
IN
– V
OUT
) across the sense resistor and the two
MOSFETs to 25mV. If the load current causes more than
25mV of voltage drop, the DGATE voltage rises to enhance
the MOSFET used for ideal diode control. For large output
currents, the ideal diode MOSFET is driven fully on and
the voltage drop across the MOSFETs is equal to the sum
of the I
LOAD
• R
DS(ON)
of the two MOSFETs in series.
In the case of an input supply short circuit when the
MOSFETs are conducting, a large reverse current starts
flowing from the load towards the input. The gate drive
amplifier detects this failure condition as soon as it ap-
pears and turns off the ideal diode MOSFET by pulling
down the DGATE pin.
In the case where an overcurrent fault occurs on the sup-
ply output, the current is limited to 65mV/R
S
. After a fault
filter delay set by 100µA charging the TMR pin capacitor,
the circuit breaker trips and pulls the HGATE pin low, turn-
ing off the Hot Swap MOSFET. Only the supply at fault is
affected, with the corresponding FAULT pin latched low.
At this point, the DGATE pin continues to pull high and
keeps the ideal diode MOSFET on.
Internal clamps limit both the DGATE to IN and CPO to IN
voltages to 12V. The same clamp also limits the CPO and
DGATE pins to a diode voltage below the IN pin. Another
internal clamp limits the HGATE to OUT voltage to 12V
and also clamps the HGATE pin to a diode voltage below
the OUT pin.
Power to the LTC4228 is supplied from either the IN or
OUT pins, through an internal diode-OR circuit to a low
dropout regulator (LDO). That LDO generates a 5V supply
at the INTV
CC
pin and powers the LTC4228’s internal low
voltage circuitry.

LTC4228IUFD-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers 2x Ideal Diode & Hot Swap Cntr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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