5
MOTOROLA
FREQUENCY SPECIFICATIONS (T
A
= 0°C to 70°C; V
CC
= 3.3V ± 0.3V)
Symbol Parameter Guaranteed Minimum Unit
Fmax (2X_Q) Maximum Operating Frequency, 2X_Q Output 100 MHz
Fmax (‘Q’) Maximum Operating Frequency,
Q0–Q3 Outputs
50 MHz
NOTE: Maximum Operating Frequency is guaranteed with the 88LV926 in a phase–locked condition.
AC CHARACTERISTICS (T
A
=0° C to +70° C, V
CC
= 3.3V ±0.3V, Load = 50Ω Terminated to V
CC
/2)
Symbol
Parameter Min Max Unit Condition
t
RISE/FALL
Outputs
Rise/Fall Time, All Outputs
(Between 0.8 to 2.0V)
0.5 2.0 ns Into a 50Ω Load
Terminated to V
CC
/2
t
PULSE
WIDTH
(Q0–Q4, Q5, Q/2)
Output Pulse Width: Q0, Q1, Q2, Q3, Q4,
Q5
, Q/2 @ V
CC
/2
0.5t
CYCLE
– 0.5
1
0.5t
CYCLE
+ 0.5
1
ns Into a 50Ω Load
Terminated to V
CC
/2
t
PULSE
WIDTH
(2X_Q Output)
Output Pulse Width: 40MHz
2X_Q @ 1.5V 66MHz
80MHz
100MHz
0.5t
CYCLE
– 1.5
0.5t
CYCLE
– 1.0
0.5t
CYCLE
– 1.0
0.5t
CYCLE
– 1.0
0.5t
CYCLE
+ 0.5
0.5t
CYCLE
+ 0.5
0.5t
CYCLE
+ 0.5
0.5t
CYCLE
+ 0.5
ns Into a 50Ω Load
Terminated to V
CC
/2
t
CYCLE
(2x_Q Output)
Cycle–to–Cycle Variation 40MHz
2x_Q @ V
CC
/2 66MHz
80MHz
100MHz
t
CYCLE
– 600ps
t
CYCLE
– 300ps
t
CYCLE
– 300ps
t
CYCLE
– 400ps
t
CYCLE
+ 600ps
t
CYCLE
+ 300ps
t
CYCLE
+ 300ps
t
CYCLE
+ 400ps
t
PD
2
(With 1MΩ from RC1 to An V
CC
)
ns
SYNC Feedback
SYNC Input to Feedback Delay 66MHz
(Measured at SYNC0 or 1 and 80MHz
FEEDBACK Input Pins) 100MHz
–1.65
–1.45
–1.25
–1.05
–0.85
–0.65
t
SKEWr
3
(Rising) See Note 4
Output–to–Output Skew Between Outputs
Q0–Q4, Q/2 (Rising Edges Only)
— 500 ps All Outputs Into a
Matched 50Ω Load
Terminated to V
CC
/2
t
SKEWf
3
(Falling)
Output–to–Output Skew Between Outputs
Q0–Q4 (Falling Edges Only)
— 750 ps All Outputs Into a
Matched 50Ω Load
Terminated to V
CC
/2
t
SKEWall
3
Output–to–Output Skew 2X_Q, Q/2,
Q0–Q4 Rising, Q5
Falling
— 750 ps All Outputs Into a
Matched 50Ω Load
Terminated to V
CC
/2
t
LOCK
4
Time Required to Acquire Phase–Lock
From Time SYNC Input Signal is
Received
1.0 10 ms Also Time to LOCK
Indicator High
t
PZL
5
Output Enable Time OE/RST to 2X_Q,
Q0–Q4, Q5
, and Q/2
3.0 14 ns Measured With the
PLL_EN Pin Low
t
PHZ
,t
PLZ
5
Output Disable Time OE/RST to 2X_Q,
Q0–Q4, Q5
, and Q/2
3.0 14 ns Measured With the
PLL_EN Pin Low
1. T
CYCLE
in this spec is 1/Frequency at which the particular output is running.
2. The T
PD
specification’s min/max values may shift closer to zero if a larger pullup resistor is used.
3. Under equally loaded conditions and at a fixed temperature and voltage.
4. With V
CC
fully powered–on, and an output properly connected to the FEEDBACK pin. t
LOCK
maximum is with C1 = 0.1µF, t
LOCK
minimum is with
C1 = 0.01µF.
5. The t
PZL
, t
PHZ
, t
PLZ
minimum and maximum specifications are estimates, the final guaranteed values will be available when ‘MC’ status is reached.
