High-Speed Connectivity
Freescale’s MPC8548E processor offers
a wide range of high-speed connectivity
options, including enhanced Triple Speed
Ethernet, serial RapidIO interconnect
technology and PCI Express. Support
for these high-speed interfaces enables
scalable connectivity to network processors
and/or ASICs in the data plane while
the PowerQUICC III handles complex,
computationally demanding control plane
processing tasks. These processors also
feature next-generation double data rate
(DDR2) memory controllers, enhanced Gigabit
Ethernet support, double precision floating
point and integrated security engines that
support the Kasumi algorithm needed for
3G wireless security. In addition, support is
provided for exclusive OR (XOR) acceleration
needed for parity in storage applications.
MPC8548E Technical Specifications
•
Embedded e500 core, initial offerings
up to 1.33 GHz, targeting up to 1.5 GHz
Dual dispatch superscalar, seven-stage
pipeline design with out-of-order issue
and execution
3065 MIPS at 1333 MHz
(estimated Dhrystone 2.1)
·· 36-bit physical addressing
•
Enhanced hardware and software
debug support
•
Double-precision embedded scalar
and vector floating-point APUs
•
Memory management unit (MMU)
•
Integrated L1/L2 cache
L1 cache—32 KB data and
32 KB instruction cache with
line-locking support
L2 cache—512 KB (8-way set
associative); 512 KB/256 KB/128 KB/64
KB can be used as SRAM
L1 and L2 hardware coherency
L2 configurable as SRAM, cache and
I/O transactions can be stashed into
L2 cache regions
•
Integrated DDR memory controller with
full ECC support, supporting:
200 MHz clock rate (400 MHz data
rate), 64-bit, 2.5V/2.6V I/O, DDR SDRAM
333 MHz clock rate (up to 667 MHz
data rate) DDR2 SDRAM
•
Integrated security engine supporting
DES, 3DES, MD-5, SHA-1/2, AES,
RSA, RNG, Kasumi F8/F9 and ARC-4
encryption algorithms
•
Four on-chip triple-speed Ethernet
controllers (GMACs) supporting
10 and 100 Mbps, and 1 Gbps Ethernet/
IEEE
®
802.3 networks with MII, RMII, GMII,
RGMII, RTBI and TBI physical interfaces
TCP/IP checksum acceleration
Advanced QoS features
•
General-purpose I/O (GPIO)
•
Serial RapidIO and PCI Express
high-speed interconnect interfaces,
supporting:
Single x8 PCI Express, or
Single x4 PCI Express and single
4x serial RapidIO
•
On-chip network (OCeaN) switch fabric
•
Multiple PCI interface support
64-bit PCI 2.2 bus controller
(up to 66 MHz, 3.3V I/O)
64-bit PCI-X bus controller
(up to 133 MHz, 3.3V I/O), or
Flexibility to configure two 32-bit
PCI controllers
•
166 MHz, 32-bit, 3.3V I/O, local bus
with memory controller
•
Integrated four-channel DMA controller
•
Dual I
2
C and Dual Universal Asynchronous
Receiver/Transmitter (DUART) support
•
Programmable interrupt controller (PIC)
•
IEEE 1149.1 JTAG test access port
•
1.2V core voltage with 3.3V and 2.5V I/O
•
783-pin FC-BGA package
Learn More:
For current information about Freescale
products and documentation, please visit
www.freescale.com.
Freescale
™
and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names
are the property of their respective owners. The Power Architecture and Power.org word marks and the Power and
Power.org logos and related marks are trademarks and service marks licensed by Power.org.
© Freescale Semiconductor, Inc. 2007
Document Number: MPC8548PQIIIFS
REV 1
MPC854X Product Comparison
Support for battery-backed DDR
Single 64-bit PCI/PCI-X
or dual 32-bit PCI
Single 64-bit PCI/PCI-X
or dual 32-bit PCI
Enhanced three-speed Ethernet Controller (eTSECs)
x8/x4/x2/x1 PCI Express
®
4x/1x serial RapidIO
®
and
x4/x2/x1 PCI Express
Double-precision floating-point APU
Integrated security engine
