ICS557-03
PCI-EXPRESS GEN1 CLOCK SOURCE PCIE SSCG
IDT™ / ICS™
PCI-EXPRESS GEN1 CLOCK SOURCE 7
ICS557-03 REV M 042709
AC Electrical Characteristics - CLK0/CLK1, CLK0/CLK1
Unless stated otherwise, VDD=3.3 V ±10%, Ambient Temperature -40 to +85° C
Note 1: Test setup is R
L
=50 ohms with 2 pF, Rr = 475Ω (1%).
Note 2: Measurement taken from a single-ended waveform.
Note 3: Measurement taken from a differential waveform.
Note 4: Measured at the crossing point where instantaneous voltages of both CLK and CLK
are equal.
Note 5: CLK pins are tri-stated when OE is low asserted. CLK is driven differential when OE is high.
Electrical Characteristics - Differential Phase Jitter
Note 1: Guaranteed by design and characterization, not 100% tested in production.
Note 2: See http://www.pcisig.com for complete specs.
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency 25 MHz
Output Frequency HCSL termination 25 200 MHz
LVDS termination 25 100 MHz
Output High Voltage
1,2
V
OH
HCSL 660 700 850 mV
Output Low Voltage
1,2
V
OL
HCSL -150 0 27 mV
Crossing Point Voltage
1,2
Absolute 250 350 550 mV
Crossing Point Voltage
1,2,4
Variation over all edges 140 mV
Jitter, Cycle-to-Cycle
1,3
80 ps
Frequency Synthesis Error All outputs 0 ppm
Modulation Frequency Spread spectrum 30 31.5 33 kHz
Rise Time
1,2
t
OR
From 0.175 V to 0.525 V 175 332 700 ps
Fall Time
1,2
t
OF
From 0.525 V to 0.175 V 175 344 700 ps
Rise/Fall Time Variation
1,2
125 ps
Output to Output Skew 50 ps
Duty Cycle
1,3
45 55 %
Output Enable Time
5
All outputs 10 12 µs
Output Disable Time
5
All outputs 10 12 µs
Stabilization Time t
STABLE
From power-up VDD=3.3 V 3.0 3.5 ms
Spread Spectrum Transition
Time
t
SPREAD
Stabilization time after spread
spectrum changes
3.0 3.5 ms
Parameter Symbol Conditions Min Typ Max Units Notes
Jitter, Phase tjphasePLL PCIe Gen 1 - - 86 ps (p-p) 1, 2
