TISP61089HDMR-S

MAY 2004 – REVISED AUGUST 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
Thermal Information
Figure 2.
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
t - Current Duration - s
0.1 1 10 100 1000
I
TSM(t)
- Non-Repetitive Peak On-State Current - A
1.5
2
3
4
5
6
7
8
9
15
1
10
TI-TISP6-001-a
V
GEN
= 600 Vrms, 50/60 Hz
R
GEN
= 1.4 x V
GEN
/I
TSM(t)
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-7 PCB, T
A
= 25 °C
SIMULTANEOUS OPERATION
OF R AND T TERMINALS.
MAY 2004 – REVISED AUGUST 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP61089HDM Overvoltage Protector
APPLICATIONS INFORMATION
Figure 3 illustrates how a typical SLIC protection circuit may look for a TISP61089HDM and a pair of Bourns
®
Telefuse
overcurrent
protectors. This is a generic circuit that is designed to withstand both lightning surge testing and AC power fault testing. As applications can
differ, it is recommended you contact your Bourns representative for detailed applications guidance on your specific design.
SLIC
-V
BAT
SLIC
PROTECTOR
TISP
61089HDM
C1
220 nF
AI-TISP6-001-b
1.0
F1b
B1250T
F1a
B1250T
Tip
Ring
D1
Fuse
10 k
D2
Figure 3. Line Protection with TISP61089HDM
MAY 2004 – REVISED AUGUST 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
APPLICATIONS INFORMATION (Continued)
TISP61089HDM Overvoltage Protector
Figure 4. Figure 5.
PEAK AC
vs
CURRENT DURATION
t - Current Duration - s
0.1 1 10 100 1000
Peak 50 Hz / 60 Hz Current - A
0.15
0.2
0.3
0.4
0.5
0.6
0.7
1.5
2
3
4
5
6
7
15
1
10
AI-TISP6-002-a
TISP61089HDM I
TSM
GR-1089 First Level Tests
TYPICAL TIME TO OPEN
vs
CURRENT
t - Current Duration - s
0.01 0.1 1 10 100 1000
RMS Current - A
2
3
4
5
6
7
8
20
30
40
50
60
1
10
AI-TISP6-003-a
B1250T
TISP61089HDM
GR-1089-CORE Issue A.C. Power Fault testing has been comprehended in the design of the TISP61089HDM. For compliance, circuit designs
must pass both First Level and Second Level A.C. Power Fault testing.
First Level Power Fault testing requires that the equipment shall not be damaged and continues to operate correctly without disruption to
other parts of the system. In laboratory tests it has been shown that the circuit shown in Figure 3 can pass these tests without damage.
Figure 4 shows the TISP61089HDM I
TSM
rating to be above the level of GR-1089-CORE First Level tests.
Second Level Power Fault testing may result in the equipment becoming non-operational, but any component failure should not allow the
equipment to become a hazard. The system should not burn, fragment, or become an electrical safety hazard. The test data in Figure 5
illustrates that the TISP61089HDM and the B1250T are current coordinated, as the fuse interrupt time is shorter than the time it takes to
damage the TISP61089HDM package for a given current.

TISP61089HDMR-S

Mfr. #:
Manufacturer:
Bourns
Description:
SCRs Dual P Gate Forward Conducting
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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