MINI ANALOG SERIES CMOS COMPARATOR
Rev.2.1_00
S-89210A/89220A
Seiko Instruments Inc.
7
Measurement Circuit
1. Power supply voltage rejection ratio, input offset voltage
V
OUT
V
DD
V
IN
+
V
DD
/ 2
-
y Power supply voltage rejection ratio (PSRR)
Input offset voltage (V
IO
)
The input offset voltage (V
IO
) is defined as V
IN
− V
DD
/2
when V
OUT
is changed by changing V
IN
to V
DD
/2 level.
The power supply voltage rejection ratio (PSRR) can be
calculated by following expression, with the value of V
IO
measured at each V
DD
.
Measurement conditions:
When V
DD
= 1.8 V: V
DD
= V
DD1
, V
IO
= V
IO1
When V
DD
= 5.0 V: V
DD
= V
DD2
, V
IO
= V
IO2
PSRR = 20 log
V
DD1
−
V
DD2
V
IO1
−
V
IO2
Figure 6
2. Common-mode input signal rejection ratio, common-mode input voltage range
V
OUT
V
DD
V
IN1
+
V
IN2
-
y Common-mode input signal rejection ratio (CMRR)
The common-mode input signal rejection ratio (CMRR)
can be calculated by the following expression, with the
offset voltage (V
IO
) set as V
IN1
minus V
IN2
after V
OUT
is
changed by changing V
IN1
.
Measurement conditions:
When V
IN2
= V
CMR
(max.): V
IN2
= V
INH
, V
IO
= V
IO1
When V
IN2
= V
DD
/2: V
IN2
= V
INL
, V
IO
= V
IO2
CMRR = 20 log
V
INH
−
V
INL
V
IO1
−
V
IO2
y Common-mode input voltage range (V
CMR
)
The common-mode input voltage range is the range
of V
IN2
in which V
OUT
satisfies the common-mode input
signal rejection ratio specifications.
Figure 7
