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PESD12VU1UT,215

P1-P3P4-P6P7-P9P10-P12P13-P14
PESDXU1UT_SER_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 August 2009 6 of 13
NXP Semiconductors
PESDxU1UT series
Ultra low capacitance ESD protection diode in SOT23 package
PESD3V3U1UT; PESD5V0U1UT
I
R
is less than 10 nA at 150 °C for:
PESD12VU1UT; PESD15VU1UT; PESD24VU1UT
Fig 3. V-I characteristics Fig 4. Relative variation of reverse leakage current
as a function of junction temperature; typical
values
006aaa407
−V
CL
−V
BR
−V
RWM
−I
RM
−I
R
−I
PP
V
I
P-N
−
+
006aaa442
T
j
(°C)
−100 150100050−50
1
10
10
−1
I
R
I
R(25˚C)
PESDXU1UT_SER_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 August 2009 7 of 13
NXP Semiconductors
PESDxU1UT series
Ultra low capacitance ESD protection diode in SOT23 package
7. Application information
The PESDxU1UT series is designed for protection of high-speed datalines from damage
caused by ESD and surge pulses. PESDxU1UT devices combine an ESD protection
diode and an ultra low capacitance compensation diode to ensure an effective device
capacitance as low as 0.6 pF. The PESDxU1UT series provides a surge capability of up to
200 W per line for an 8/20 µs waveform.
Two PESDxU1UT devices in anti-parallel configuration provide ESD protection in a common-mode
application.
The two PESDxU1UT devices should be connected as follows:
protected data line is connected to
device 1 / pin 2
device 2 / pin 1
Ground is connected to
device 1 / pin 1
device 2 / pin 2
pin 3 is not connected for both devices
Fig 5. Bidirectional ESD protection of one line, common mode
Two PESDxU1UT devices in anti-parallel configuration provide ESD protection in a
differential-mode configuration as e.g. for Ethernet applications.
The two PESDxU1UT should be connected as follows:
I/O line 1 is connected to
device 1 / pin 2
device 2 / pin 1
I/O line 2 is connected to
device 1 / pin 1
device 2 / pin 2
pin 3 is not connected for both devices
Fig 6. Differential mode Ethernet protection
006aaa443
3
n.c.n.c.
3
1
protected data line
ground
PESDxU1UTPESDxU1UT
21
2
ETHERNET
TRANSCEIVER
006aaa444
3
n.c.n.c.
I/O 1
I/O 2
3
1
PESDxU1UTPESDxU1UT
21
2
PESDXU1UT_SER_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 20 August 2009 8 of 13
NXP Semiconductors
PESDxU1UT series
Ultra low capacitance ESD protection diode in SOT23 package
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PESDxU1UT as close to the input terminal or connector as possible.
2. The path length between the PESDxU1UT and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
boards, use ground vias.
P1-P3P4-P6P7-P9P10-P12P13-P14

PESD12VU1UT,215

Mfr. #:
Buy PESD12VU1UT,215
Manufacturer:
Nexperia
Description:
TVS Diodes / ESD Suppressors 12V ESD PROTECTION
Lifecycle:
New from this manufacturer.
Delivery:
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