MAX6920AWP+T

MAX6920
12-Output, 76V, Serial-Interfaced
VFD Tube Driver
4 _______________________________________________________________________________________
Typical Operating Characteristics
(V
CC
= 5.0V, V
BB
= 76V, and T
A
= +25°C, unless otherwise noted.)
TUBE SUPPLY CURRENT (I
BB
)
vs. TEMPERATURE (OUTPUTS LOW)
MAX6920 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
11060 8510 35-15
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
-40
V
BB
= 76V
V
BB
= 40V
V
BB
= 8V
TUBE SUPPLY CURRENT (I
BB
)
vs. TEMPERATURE (OUTPUTS HIGH)
MAX6920 toc02
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
1008040 60020-20
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
-40 120
V
BB
= 76V
V
BB
= 40V
V
BB
= 8V
LOGIC SUPPLY CURRENT (I
CC
)
vs. TEMPERATURE (OUTPUTS LOW)
MAX6920 toc03
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
1008040 60020-20
50
100
150
200
250
300
350
400
0
-40 120
V
CC
= 5V, CLK = 5MHz
V
CC
= 3.3V, CLK = 5MHz
V
CC
= 5V, CLK = IDLE
V
CC
= 3.3V, CLK = IDLE
SUPPLY CURRENT (I
CC
)
vs. TEMPERATURE (OUTPUTS HIGH)
MAX6920 toc04
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6010
300
350
400
450
500
550
600
250
-40 110
V
CC
= 5V, CLK = 5MHz
V
CC
= 3.3V, CLK = 5MHz
V
CC
= 5V, CLK = IDLE
V
CC
= 3.3V, CLK = IDLE
OUTPUT VOLTAGE (V
BB
- V
H
)
vs. TEMPERATURE (OUTPUT HIGH)
MAX6920 toc05
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
1008040 60020-20
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
-40 120
V
BB
= 76V
V
BB
= 40V
V
BB
= 8V
I
OUT
= -40mA
OUTPUT VOLTAGE
vs. TEMPERATURE (OUTPUT LOW)
MAX6920 toc06
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
1008040 60020-20
2
4
6
8
10
12
14
0
-40 120
V
BB
= 40V
V
BB
= 8V
V
BB
= 76V
I
OUT
= 4mA
OUTPUT RISE AND FALL WAVEFORM
MAX6920 toc11
1µs/div
BLANK
2V/div
OUT_
20V/div
MAX6920
12-Output, 76V, Serial-Interfaced
VFD Tube Driver
_______________________________________________________________________________________ 5
PIN NAME FUNCTION
1V
BB
VFD Tube Supply Voltage
2 DOUT Serial-Clock Output. Data is clocked out of the internal shift register to DOUT on CLKs rising edge.
38, 1318
OUT0 to
OUT11
VFD Anode and Grid Drivers. OUT0 to OUT11 are push-pull outputs swinging from V
BB
to GND.
9 BLANK
Blanking Input. High forces outputs OUT0 to OUT11 low, without altering the contents of the output
latches. Low enables outputs OUT0 to OUT11 to follow the state of the output latches.
10 GND Ground
11 CLK Serial-Clock Input. Data is loaded into the internal shift register on CLKs rising edge.
12 LOAD
Load Input. Data is loaded transparently from the internal shift register to the output latch while LOAD
is high. Data is latched into the output latch on LOAD's rising edge, and retained while LOAD is low.
19 DIN Serial-Data Input. Data is loaded into the internal shift register on CLKs rising edge.
20 V
CC
Logic Supply Voltage
Pin Description
SERIAL-TO-PARALLEL SHIFT REGISTER
LATCHES
CLK
DIN
LOAD
BLANK
OUT0 OUT1 OUT2
OUT11
DOUT
MAX6920
Figure 1. MAX6920 Functional Diagram
MAX6920
12-Output, 76V, Serial-Interfaced
VFD Tube Driver
6 _______________________________________________________________________________________
Detailed Description
The MAX6920 is a VFD tube driver comprising a 4-wire
serial interface driving 12 high-voltage Rail-to-Rail®
output ports. The driver is suitable for both static and
multiplexed displays.
The output ports feature high current-sourcing capabili-
ty to drive current into grids and anodes of static or
multiplex VFDs. The ports also have active current sink-
ing for fast discharge of capacitive display electrodes
in multiplexing applications.
The 4-wire serial interface comprises a 12-bit shift reg-
ister and a 12-bit transparent latch. The shift register is
written through a clock input CLK and a data input DIN
and the data propagates to a data output DOUT. The
data output allows multiple drivers to be cascaded and
operated together. The output latch is transparent to
the shift register outputs when LOAD is high, and latch-
es the current state on the falling edge of LOAD.
Each driver output is a slew-rated controlled CMOS
push-pull switch driving between V
BB
and GND. The
output rise time is always slower than the output fall
time to avoid shoot-through currents during output tran-
sitions. The output slew rates are slow enough to mini-
mize EMI, yet are fast enough so as not to impact the
typical 100µs digit multiplex period and affect the dis-
play intensity.
Initial Power-Up and Operation
An internal reset circuit clears the internal registers of
the MAX6920 on power-up. All outputs OUT0 to OUT11
and the interface output DOUT initialize low regardless
of the initial logic levels of the CLK, DIN, BLANK, and
LOAD inputs.
4-Wire Serial Interface
The MAX6920 uses a 4-wire serial interface with three
inputs (DIN, CLK, LOAD) and a data output (DOUT).
This interface is used to write output data to the
MAX6920 (Figure 3) (Table 1). The serial interface data
word length is 12 bits, D0D11.
The functions of the four serial interface pins are:
CLK input is the interface clock, which shifts data
into the MAX6920s 12-bit shift register on its rising
edge.
LOAD input passes data from the MAX6920s 12-
bit shift register to the 12-bit output latch when
LOAD is high (transparent latch), and latches the
data on LOADs falling edge.
SLEW- RATE
CONTROL
V
BB
OUT_
40
TYPICAL
750
TYPICAL
Figure 2. MAX6920 CMOS Output Driver Structure
LOAD
t
CSW
t
CP
t
CSH
t
CH
t
DH
t
DO
t
DS
D11 D10 D1 D0
D11
t
CL
CLK
DIN
DOUT
Figure 3. 4-Wire Serial Interface Timing Diagram
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.

MAX6920AWP+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
VFD Drivers 12-Output 76V Serial VFD Tube Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet