9TCS1082
MOBILE ACCESS™—CLOCK SYNTHESIZER & TEMPERATURE SENSOR FOR PORTABLE DEVICES SYNTHESIZERS
IDT®
MOBILE ACCESS™—CLOCK SYNTHESIZER & TEMPERATURE SENSOR FOR PORTABLE DEVICES 6
9TCS1082 REV 0.7 012312
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9TCS1082. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over
the recommended operating temperature range.
Electrical Characteristics–SMBus Interface
AC Electrical Characteristics–Input/Common Parameters
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
Maximum Supply Voltage VDDxxx Core/Logic Supply 3.6 V 1,2
Maximum Supply Voltage VDDIOxxx Core/Logic Supply 3.6 V 1,2
Maximum Input Voltage
V
IH
3.3V LVCMOS Inputs 3.6 V 1,2,3
Minimum Input Voltage
V
IL
Any Input GND - 0.5 V 1,2
Storage Temperature Ts - -65 150
°
C
Case Tem
erature Tcase
115 °C 1,2
Unless otherwise noted
uaranteed b
desi
n and characterization
not 100% tested in
roduction.
2
Operation under these conditions is neither implied, nor guaranteed.
3
Maximum input voltage is not to exceed maximum VDD
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
SMBus Voltage V
DD
2.7 3.6 V 1
Low-level Output Voltage
V
OL SMB
@ I
PUL LUP
0.4 V 1
Current sinking at
V
OLSMB
= 0.4 V
I
PULLUP
SMB Data Pin 4 mA 1
SCLK/SDATA
Clock/Data Rise Time
T
RI2C
(Max VIL - 0.15) to
Min VIH + 0.15
Clock/Data Fall Time
T
FI 2C
(Min VIH + 0.15) to
Max VIL - 0.15
Maximum SMBus Operating
Fre
uenc
F
SMBUS
Block Mode 400 kHz 1
1
Unless otherwise noted,
uaranteed b
desi
n and characterization, not 100% tested in
roduction.
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS Notes
Clk Stabilization
T
STAB
From VDD Power-Up or de-
assertion of PD# to 1st cloc
1.8 ms 1
Tdrive_PD# T
DRPD
Differential output enable after
PD# de-assertion
Unless otherwise noted,
uaranteed b
desi
n and characterization, not 100% tested in
roduction.