OBSOLETE PRODUCT
NOT RECOMMENDED FOR NEW DESIGNS
U
LTRA
-L
OW
S
TART
-U
P
C
URRENT
, C
URRENT
-M
ODE
PWM
LX1552/3/4/5
PRODUCT DATABOOK 1996/1997
13
Copyright © 1994
Rev. 1.0b
PRODUCTION DATA SHEET
THEORY OF OPERATION
VOLTAGE REFERENCE
The voltage reference is a low drift bandgap design which
provides +5.0V to supply charging current to the oscillator timing
capacitor, as well as supporting internal circuitries. Initial
accuracy for all devices are specified at ±1% max., which is a 2x
improvement for the commercial product when compared to the
SG384x series. The reference is capable of providing in excess
of 20mA for powering any external control circuitries and has
built-in short circuit protection.
FIGURE 25 — SIMPLIFIED SCHEMATIC OF OSCILLATOR SECTION
OSCILLATOR
The oscillator circuit is designed such that discharge current and
valley voltage are trimmed independently. This results in more
accurate initial oscillator frequency and maximum output duty
cycle, especially important in LX1552/53 applications. The
oscillator is programmed by the values selected for the timing
components (R
T
) and (C
T
). A simplified schematic of the oscillator
is shown in Figure 25. The operation is as follows; Capacitor (C
T
)
is charged from the 5V reference thru resistor (R
T
) to a peak
voltage of 2.7V nominally. Once the voltage reaches this
threshold, comparator (A1) changes state, causing (S1) to switch
to position (2) and (S2) to (V
V
) position. This will allow the
capacitor to discharge with a current equal to the difference
between a constant discharge current (I
D
) and current through
charging resistor (I
R
), until the voltage drops down to 1V
nominally and the comparator changes state again, repeating the
cycle. Oscillator charge time results in the output to be in a high
state (on time) and discharge time sets it to a low state (off time).
Since the oscillator period is the sum of the charge and discharge
time, any variations in either of them will ultimately affect stability
of the output frequency and the maximum duty cycle. In fact, this
FIGURE 24 — REFERENCE VOLTAGE vs. TEMPERATURE
4.95
4.99
(T
A
) Ambient Temperature - (°C)
(V
REF
) Reference Voltage - (V)
4.97
5.00
4.96
5.01
5.02
4.98
-75
-50 -25 0 25 50 75 100 125
5.03
V
CC
= 15V
I
L
= 1mA
FIGURE 26 — DUTY CYCLE VARIATION vs. DISCHARGE CURRENT
20
60
(R
T
) Timing Resistor - ()
100
Oscillator Duty Cycle - (%)
40
70
600 700 800 900
1000
T
A
= 25°C
V
P
= 2.7V
V = 1V
V
REF
= 5V
30
80
90
50
I
d
= 7.5mA
I
d
= 8.0mA
I
d
= 8.6mA
I
d
= 9.3mA
SG384x Lower Limit
LX155x Limits
SG384x Upper Limit
C
T
R
T
I
R
REF
5V
R
T
/C
T
I
D
= 8.3mA
2
1
OPEN
2.8V 1.1V
S2
V
P
V
V
S1
A1
TO OUTPUT
STAGE
variation is more pronounced when maximum duty cycle has to
be limited to 50% or less. This is due to the fact that for longer
output off time, capacitor discharge current (I
D
- I
R
) must be
decreased by increasing I
R
. Consequently, this increases the
sensitivity of the frequency and duty cycle to any small variations
of the internal current source (I
D
), making this parameter more
critical under those conditions. Because this is a desired feature
in many applications, this parameter is trimmed to a nominal
current value of 8.3±0.3mA at room temperature, and guaranteed
to a maximum range of 7.8 to 8.8mA over the specified ambient
temperature range.
Figure 26 shows variation of oscillator duty
cycle versus discharge current for LX155x and SG384x series
devices.
OBSOLETE PRODUCT
NOT RECOMMENDED FOR NEW DESIGNS
U
LTRA
-L
OW
S
TART
-U
P
C
URRENT
, C
URRENT
-M
ODE
PWM
LX1552/3/4/5
PRODUCT DATABOOK 1996/1997
Copyright © 1994
Rev. 1.0b
14
P
RODUCTION DATA SHEET
Given: frequency f; maximum duty-cycle Dm
Calculate:
1) R
T
= 277 (), 0.3 Dm 0.95
Note: R
T
must always be greater than 520 for proper
operation of oscillator circuit.
2) C
T
= (µf)
for duty cycles above 95% use:
3) f where R
T
5k
THEORY OF OPERATION
OSCILLATOR (continued)
The oscillator is designed such that many values of R
T
and C
T
will
give the same frequency, but only one combination will yield a
specific duty cycle at a given frequency. A set of charts as well
as the timing equations are given to determine approximate
values of timing components for a given frequency and duty
cycle.
1-Dm
Dm
(1.74) -1
1
Dm
1.81
R
T
C
T
(1.74) -1
Example: A flyback power supply design requires the duty cycle
to be limited to less than 45%. If the output switching frequency
is selected to be 100kHz, what are the values of R
T
and C
T
for the
a) LX1552/53, and the b) LX1554/55 ?
FIGURE 28 — MAXIMUM DUTY CYCLE vs. TIMING RESISTOR
0.1
0
40
(R
T
) Timing Resistor - (k)
100
Maximum Duty Cycle - (%)
20
50
80
110100
10
60
70
90
30
V
CC
= 15V
T
A
= 25°C
1.81
*
Dm
f
*
R
T
100
0.1
0.1
1
1000
Oscillator Frequency - (kHz)
(R
T
) Timing Resistor - (k)
100
10
1
10
V
CC
= 15V
T
A
= 25°C
C
T
= 3.3nF
C
T
= 1nF
C
T
= 6.8nF
C
T
= 22nF
C
T
= 47nF
C
T
= 0.1µF
FIGURE 27 — OSCILLATOR FREQUENCY vs. TIMING RESISTOR
a) LX1552/53
Given: f = 100kHz
Dm = 0.45
R
T
= 267 = 669
C
T
= = .012 µf
b) LX1554/55
f
OUT
= ½ f
OSC
(due to internal flip flop)
f
OSC
= 200kHz
select C
T
= 1000pf
using Figure 27 or Equation 3: R
T
= 9.1k
(1.74) -1
(1.74) -1
1
.45
.55
.45
1.81
*
0.45
100x10
3
*
669
OBSOLETE PRODUCT
NOT RECOMMENDED FOR NEW DESIGNS
U
LTRA
-L
OW
S
TART
-U
P
C
URRENT
, C
URRENT
-M
ODE
PWM
LX1552/3/4/5
PRODUCT DATABOOK 1996/1997
15
Copyright © 1994
Rev. 1.0b
PRODUCTION DATA SHEET
THEORY OF OPERATION
CURRENT SENSE COMPARATOR AND PWM LATCH
Switch current is sensed by an external sense resistor (or a current
transformer), monitored by the C.S. pin and compared internally
with voltage from error amplifier output. The comparator output
resets the PWM latch ensuring that a single pulse appears at the
output for any given oscillator cycle. The LX1554/55 series has
an additional flip flop stage that limits the output to less than 50%
duty cycle range as well as dividing its output frequency to half
of the oscillator frequency. The current sense comparator
threshold is internally clamped to 1V nominally which would
limit peak switch current to:
Equation 1 is used to calculate the value of sense resistor during
the current limit condition where switch current reaches its
maximum level. In normal operation of the converter, the
relationship between peak switch current and error voltage
(voltage at pin 1) is given by:
The above equation is plotted in Figure 29. Notice that the gain
becomes non-linear above current sense voltages greater than
0.95 volts. It is therefore recommended to operate below this
range during normal operation. This would insure that the overall
closed loop gain of the system will not be affected by the change
in the gain of the current sense stage.
0
0.4
Error Amplifier Output Voltage - (V)
Current Sense Threshold - (V)
0.2
0.5
0.1
0.6
0.7
0.3
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 5.0
1.0
0.8
0.9
4.0 4.5
T
A
= 25°C
1.1
T
A
= 125°C
T
A
= -55°C
FIGURE 29 — CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT
ERROR AMPLIFIER
The error amplifier has a PNP input differential stage with access
to the Inverting input and the output pin. The N.I. input is
internally biased to 2.5 volts and is not available for any external
connections. The maximum input bias current for the LX155XC
series is 0.5µA, while LX155XI/155XM devices are rated for 1µA
maximum over their specified range of ambient temperature.
Low value resistor dividers should be used in order to avoid
output voltage errors caused by the input bias current. The error
amplifier can source 0.5mA and sink 2mA of current. A minimum
feedback resistor (R
F
) value of is given by:
OUTPUT STAGE
The output section has been specifically designed for direct drive
of power MOSFETs. It has a totempole configuration which is
capable of high peak current for fast charging and discharging of
external MOSFET gate capacitance. This typically results in a rise
and fall time of 50ns for a 1000pf capacitive load. Each output
transistor (source and sink) is capable of supplying 200mA of
continuous current with typical saturation voltages versus tem-
perature as shown in Figures 21 & 22 of the characteristic curve
section. All devices are designed to minimize the amount of
shoot-thru current which is a result of momentary overlap of
output transistors. This allows more efficient usage of the IC at
higher frequencies, as well as improving the noise susceptibility
of the device. Internal circuitry insures that the outputs are held
off during V
CC
ramp-up. Figure 20, in the characteristic curves
section, shows output sink saturation voltage vs. current at 5V.
V
Z
R
S
(1) I
SP
= where: I
SP
Peak switch current
V
Z
internal zener
0.9V V
Z
1.1V
(1) I
SP
= where: V
E
Voltage at pin 1
V
F
Diode - Forward voltage
0.7V at T
A
= 25°C
V
E
- 2V
F
3
*
R
S
R
FMIN
= 10K
3(1.1) + 1.8
0.5mA

LX1555CDM

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
IC REG CTRLR BUCK/BOOST 8SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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