NCP1653, NCP1653A
www.onsemi.com
16
Figure 40. Self−biasing Scheme in Constant Output
Voltage Mode
V
C1C2
out
V
in
V
CC
When the NCP1653 circuit is required to be startup
independently from the second−stage converter, it is
recommended to use a circuit in Figure 41. When there is
no feedback current (I
FB
= 0 mA) applied to FB pin (Pin 1),
the NCP1653 V
CC
startup current is as low (50 mA
maximum). It is good for saving the current to charge the
V
CC
capacitor. However, when there is some feedback
current the startup current rises to as high as 1.5 mA in the
V
CC
< 4 V region. That is why the circuit of Figure 41 can
be implemented: a PNP bipolar transistor derives the
feedback current to ground at low V
CC
levels (V
CC
< 4 V)
so that the startup current keeps low and an initial voltage
can be quickly built up in the V
CC
capacitor. The values in
Figure 41 are just for reference.
Figure 41. Recommended Startup Biasing Scheme
180k
NCP1653
100uF
560k
Input
Output
1.5M
180k
180k
BC556
V
CC
Undervoltage Lockout (UVLO)
The device typically starts to operate when the supply
voltage V
CC
exceeds 13.25 V. It turns off when the supply
voltage V
CC
goes below 8.7 V. An 18 V internal ESD Zener
Diode is connected to the V
CC
pin (Pin 8) to prevent
excessive supply voltage. After startup, the operating range
is between 8.7 V and 18 V.
Thermal Shutdown
An internal thermal circuitry disables the circuit gate
drive and then keeps the power switch off when the junction
temperature exceeds 150_C. The output stage is then
enabled once the temperature drops below typically 120_C
(i.e., 30_C hysteresis). The thermal shutdown is provided
to prevent possible device failures that could result from an
accidental overheating.
Output Drive
The output stage of the device is designed for direct drive
of power MOSFET. It is capable of up to ±1.5 A peak drive
current and has a typical rise and fall time of 88 and
61.5 ns with a 2.2 nF load.