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MC74LVX132M

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 4
1 Publication Order Number:
MC74LVX132/D
MC74LVX132
Quad 2-Input NAND
Schmitt Trigger
The MC74LVX132 is an advanced high speed CMOS Schmitt
NAND trigger fabricated with silicon gate CMOS technology.
Pin configuration and function are the same as the MC74LVX00,
but the inputs have hysteresis.
The internal circuit is composed of multiple stages, including
a buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: t
PD
= 5.8 ns (Typ) at V
CC
= 3.3 V
• Low Power Dissipation: I
CC
= 2 mA (Max) at T
A
= 25°C
• Power Down Protection Provided on Inputs
• Low Noise: V
OLP
= 0.5 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: Human Body Model > 2000 V;
Machine Model > 200 V
• These Devices are Pb−Free and are RoHS Compliant
Figure 1. Logic Diagram
Y1
A1
1
3
B1
2
Y2
A2
4
6
B2
5
Y3
A3
9
8
B3
10
Y4
A4
12
11
B4
13
FUNCTION TABLE
L
L
H
H
A Input Y Output
H
H
H
L
L
H
L
H
B Input
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
MARKING DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
SOIC−14 NB
D SUFFIX
CASE 751A
LVX132G
AWLYWW
1
14
LVX
132
ALYWG
G
1
14
LVX132 = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
TSSOP−14
SOIC−14 NB
PIN ASSIGNMENT
14−Lead (Top View)
1314 12 11 10 9 8
21 34567
V
CC
B4 A4 Y4 B3 A3 Y3
A1 B1 Y1 A2 B2 Y2 GND
MC74LVX132
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage −0.5 to )7.0 V
V
IN
DC Input Voltage −0.5 to )7.0 V
V
OUT
DC Output Voltage −0.5 to V
CC
)0.5 V
I
IK
DC Input Diode Current V
I
< GND −20 mA
I
OK
DC Output Diode Current V
O
< GND ±20 mA
I
OUT
DC Output Sink Current ±25 mA
I
CC
DC Supply Current per Supply Pin ±50 mA
T
STG
Storage Temperature Range −65 to )150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260
_C
T
J
Junction Temperature under Bias )150
_C
q
JA
Thermal Resistance SOIC
TSSOP
250
_C/W
P
D
Power Dissipation in Still Air at 85_CSOIC
TSSOP
250 mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating Oxygen Index: 30% − 35% UL 94−V0 @ 0.125 in
V
ESD
ESD Withstand Voltage Human Body Model (Note 1)
Machine Model (Note 2)
Charged Device Model (Note 3)
> 2000
> 200
N/A
V
I
Latchup
Latchup Performance Above V
CC
and Below GND at 85_C (Note 4)
±300 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Tested to EIA/JESD22−A114−A.
2. Tested to EIA/JESD22−A115−A.
3. Tested to JESD22−C101−A.
4. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
Supply Voltage 2.0 3.6 V
V
I
Input Voltage (Note 5) 0 5.5 V
V
O
Output Voltage (HIGH or LOW State) 0 5.5 V
T
A
Operating Free−Air Temperature *40 )125
_C
Dt/DV
Input Transition Rise or Fall Rate V
CC
= 3.0 V $0.3 V 0 100 ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
MC74LVX132
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3
DC ELECTRICAL CHARACTERISTICS
Symbo
l
Parameter Test Conditions
V
CC
V
T
A
= 25°C T
A
= ≤ 85°C T
A
= ≤ 125°C
Uni
t
Min Typ Max Min Max Min Max
V
T+
Positive Threshold Voltage
(Figure 4)
2.0
3.0
3.6
1.15
1.50
1.70
1.31
1.82
2.12
1.60
2.25
2.60
1.15
1.50
1.70
1.60
2.25
2.60
1.15
1.50
1.70
1.60
2.25
2.60
V
V
T−
Negative Threshold Voltage
(Figure 4)
2.0
3.0
3.6
0.30
0.75
1.00
0.64
1.13
1.46
0.9
1.45
1.90
0.30
0.75
1.00
0.90
1.45
1.90
0.30
0.75
1.00
0.90
1.45
1.90
V
V
H
Hysteresis Voltage
(Figure 4)
2.0
3.0
3.6
0.30
0.30
0.35
0.70
0.76
0.69
1.30
1.50
1.60
0.30
0.30
0.35
1.30
1.50
1.60
0.30
0.30
0.35
1.30
1.50
1.60
V
V
OH
Minimum High−Level Output
Voltage
V
IN
= V
IH
or V
IL
I
OH
= − 50 mA
I
OH
= − 50 mA
I
OH
= − 4 mA
2.0
3.0
3.0
1.9
2.9
2.58
2.0
3.0
1.9
2.9
2.48
1.9
2.9
2.34
V
V
OL
Maximum Low−Level Output
Voltage
V
IN
= V
IH
or V
IL
I
OL
= 50 mA
I
OL
= 50 mA
I
OL
= 4 mA
2.0
3.0
3.0
0.0
0.0
0.1
0.1
0.36
0.1
0.1
0.44
0.1
0.1
0.52
V
I
in
Maximum Input Leakage
Current
V
in
= 5.5 V or
GND
3.6 ±0.1 ±1.0 ±1.0
mA
I
CC
Maximum Quiescent Supply
Current
V
in
= V
CC
or GND 3.6 2.0 20 20
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0ns)
Symbo
l
Parameter Test Conditions
T
A
= 25°C T
A
= ≤ 85°C T
A
= ≤ 125°C
Uni
t
Min Typ Max Min Max Min Max
t
PLH
,
t
PHL
Maximum Propagation
Delay,
A or B to Y
V
CC
= 2.7V C
L
= 15pF
C
L
= 50pF
7.0
10.0
11.0
16.0
1.0
1.0
13.0
18.7
1.0
1.0
15.0
20.0
ns
V
CC
= 3.3 ± 0.3V C
L
= 15pF
C
L
= 50pF
5.8
8.3
10.6
15.4
1.0
1.0
12.5
17.5
1.0
1.0
14.5
19.5
t
OSHL
,
t
OSLH
Output to Output Skew
(Note 6)
V
CC
= 2.7V C
L
= 50pF 1.5 1.5 1.5
ns
V
CC
= 3.3 ± 0.3V C
L
= 50pF 1.5 1.5 1.5
C
in
Maximum Input
Capacitance
4 10 10 10 pF
C
PD
Power Dissipation Capacitance (Note 6)
Typical @ 25°C, V
CC
= 5.0 V
pF
11
6. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/4 (per gate). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS (Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 5.0 V)
Symbo
l
Characteristic
T
A
= 25°C
Uni
t
Typ Max
V
OLP
Quiet Output Maximum Dynamic V
OL
0.3 0.5 V
V
OLV
Quiet Output Minimum Dynamic V
OL
−0.3 −0.5 V
V
IHD
Minimum High Level Dynamic Input Voltage 2.0 V
V
ILD
Maximum Low Level Dynamic Input Voltage 0.8 V
P1-P3P4-P6P7-P7

MC74LVX132M

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Manufacturer:
ON Semiconductor
Description:
IC GATE NAND 4CH 2-INP 14SOEIAJ
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