4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/13/06
IS61LV10248 ISSI
®
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VDD = Min., IOH = –4.0 mA 2.4 V
VOL Output LOW Voltage VDD = Min., IOL = 8.0 mA 0.4 V
VIH Input HIGH Voltage 2.2 VDD + 0.3 V
VIL Input LOW Voltage
(1)
–0.3 0.8 V
I
LI Input Leakage GND VIN VDD Com. 1 1 µA
Ind. 5 5
ILO Output Leakage GND VOUT VDD, Outputs Disabled Com. 1 1 µA
Ind. 5 5
Note:
1. V
IL
= –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-8 -10
Symbol Parameter Test Conditions Min. Max. Min. Max. Unit
ICC VDD Dynamic Operating VDD = Max., Com. 110 100 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. 120 110
ISB1 TTL Standby Current VDD = Max., Com. 30 30 mA
(TTL Inputs) VIN = VIH or VIL Ind. 35 35
CE VIH, f = 0
ISB2 CMOS Standby VDD = Max., Com. 20 20 mA
Current (CMOS Inputs) CE VDD – 0.2V, Ind. 25 25
VIN VDD – 0.2V, or
VIN 0.2V
, f = 0
Note:
1. At f = f
MAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
5
Rev. C
04/13/06
IS61LV10248 ISSI
®
AC TEST LOADS
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0V to 3.0V
Input Rise and Fall Times 3 ns
Input and Output Timing 1.5V
and Reference Levels
Output Load See Figures 1 and 2
Figure 1
319 Ω
5 pF
Including
jig and
scope
353 Ω
OUTPUT
3.3V
Figure 2
ZO = 50Ω
1.5V
50Ω
OUTPUT
30 pF
Including
jig and
scope
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/13/06
IS61LV10248 ISSI
®
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-8 -10
Symbol Parameter Min. Max. Min. Max. Unit
tRC Read Cycle Time 8 10 ns
tAA Address Access Time 8 10 ns
tOHA Output Hold Time 3 3 ns
tACE CE Access Time 8 10 ns
tDOE OE Access Time 3.5 4 ns
tHZOE
(2)
OE to High-Z Output 3 4 ns
tLZOE
(2)
OE to Low-Z Output 0 0 ns
tHZCE
(2
CE to High-Z Output 3 0 4 ns
tLZCE
(2)
CE to Low-Z Output 3 3 ns
tPU Power Up Time 0 0 ns
tPD Power Down Time 8 10 ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.

IS61LV10248-10T-TR

Mfr. #:
Manufacturer:
ISSI
Description:
SRAM 8Mb 1Mb x 8 10ns
Lifecycle:
New from this manufacturer.
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