ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635
Rev. A | Page 4 of 16
TIMING %*"(3".4
SD
OUTA,
OUTB
90%
t
dL_SD
10%
t
dH_SD
08132-002
Figure 2. Shutdown Timing Diagram
INA,
INB
OUTA,
OUTB
t
D1
t
RISE
10%
90%
10%
90%
V
IH
V
IL
t
D2
t
FALL
08132-003
Figure 3. Output Timing Diagram (Noninverting)
INA,
INB
OUTA,
OUTB
t
D1
t
RISE
10%
90%
10%
90%
V
IL
V
IH
t
D2
t
FALL
08132-003
Figure 4. Output Timing Diagram (Inverting)
Figure 5. UVLO Function
ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635
Rev. A | Page 5 of 16
OT SHUTDOWN
OUTPUTS
DISABLED
NORMAL OPERATION NORMAL OPERATION
T
J
T
W
T
SD
T
SD
T
HYS_SD
T
W
T
HYS_W
OT WARNING
OUTPUTS
ENABLED
OT WARNING
OUTPUTS
ENABLED
OTW
08132-006
Figure 6. Overtemperature Warning and Shutdown
ADP3623/ADP3624/ADP3625/ADP3633/ADP3634/ADP3635
Rev. A | Page 6 of 16
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VDD −0.3 V to +20 V
OUTA, OUTB
DC −0.3 V to V
DD
+ 0.3 V
<200 ns −2 V to V
DD
+ 0.3 V
INA,
INA
, INB, −0.3 V to V
DD
+ 0.3 V
INB
, and SD
ESD
Human Body Model (HBM) 3.5 kV
Field Induced Charged Device Model
(FICDM)
SOIC_N_EP 1.5 kV
MINI_SO_EP 1.0 kV
θ
JA
, JEDEC 4-Layer Board
SOIC_N_EP
1
59°C/W
MINI_SO_EP
1
43°C/W
Junction Temperature Range −40°C to +150°C
Storage Temperature Range −65°C to +150°C
Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 260°C
1
θ
JA
is measured per JEDEC standards, JESD51-2, JESD51-5, and JESD51-7, as
appropriate with the exposed pad soldered to the PCB.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION

ADP3634ARDZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Gate Drivers High Speed Dual 4A MOSFET Dvr
Lifecycle:
New from this manufacturer.
Delivery:
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