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M74HC174TTR
P1-P3
P4-P6
P7-P9
P10-P11
M74HC174
4/11
DC S
PE
C
I
F
I
CATIONS
Symbo
l
Param
eter
T
est Conditi
on
V
alue
Unit
V
CC
(V)
T
A
= 25°
C
-40 to 8
5°C
-55 to 1
25°C
Min.
Typ.
Max
.
Min.
Ma
x.
Mi
n.
Max.
V
IH
High Lev
el Input
V
oltage
2.0
1.5
1.5
1.5
V
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
V
IL
Low Lev
el Input
V
oltage
2.0
0.5
0.5
0.5
V
4.5
1.35
1.3
5
1.
35
6.0
1.8
1.8
1.8
V
OH
High Lev
el Output
V
oltage
2.0
I
O
=-20
µ
A
1.9
2.0
1.9
1.
9
V
4.5
I
O
=-20
µ
A
4.4
4.5
4.4
4.
4
6.0
I
O
=-20
µ
A
5.9
6.0
5.9
5.
9
4.5
I
O
=-4.0 m
A
4.18
4.31
4.13
4.1
0
6.0
I
O
=-5.2 m
A
5.68
5.8
5.63
5.60
V
OL
Low Lev
el Output
V
oltage
2.0
I
O
=20
µ
A
0.0
0.1
0.1
0
.1
V
4.5
I
O
=20
µ
A
0.0
0.1
0.1
0
.1
6.0
I
O
=20
µ
A
0.0
0.1
0.1
0
.1
4.5
I
O
=4.0 mA
0.17
0.26
0.3
3
0.
40
6.0
I
O
=5.2 mA
0.18
0.26
0.3
3
0.
40
I
I
Input Le
akage
Current
6.0
V
I
= V
CC
or GN
D
±
0.1
±
1
±
1
µ
A
I
CC
Quiesce
nt Supply
Current
6.0
V
I
= V
CC
or GN
D
44
0
8
0
µ
A
M74HC174
5/11
AC E
L
ECT
RI
CAL C
HARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 6ns
)
CAPACITIVE CHARA
CT
ERISTICS
1)
C
PD
is
d
efined
as
t
he valu
e of the I
C’s int
ernal eq
uiva
lent capa
citan
ce whic
h is calc
ulate
d from t
he oper
ating cur
rent c
onsu
mption
w
ith
ou
t
lo
ad. (Re
fer t
o Tes
t
Cir
c
u
it).
A
v
erag
e oper
ating
curre
nt can
be ob
tained
by t
he fol
lowing
equ
ation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/6 (per
FLIP/
FLOP)
An
d the tota
l CPD w
hen N pcs of
FLIP-F
LOP oper
ate c
an be gaine
d by th
e f
o
llowin
g equat
ion : CP
D (tota
l) = 38 + 15 x n
Symbo
l
Param
eter
T
est Conditi
on
V
alue
Unit
V
CC
(V)
T
A
= 25°
C
-40 to 8
5°C
-55 to 1
25°C
Min.
Typ.
Max
.
Min.
Ma
x.
Mi
n.
Max.
t
TLH
t
THL
Output Transitio
n
Time
2.0
30
75
95
1
10
ns
4
.
5
8
1
51
92
2
6
.
0
7
1
31
61
9
t
PLH
t
PHL
Propaga
tion Delay
Time (CLOCK -
Q)
2.0
68
135
170
205
ns
4.5
17
27
34
41
6.0
14
23
29
35
t
PLH
t
PHL
Propaga
tion Delay
Time (CLEAR
- Q)
2.0
72
145
180
220
ns
4.5
18
29
36
44
6.0
15
25
31
37
f
MAX
Maximum
Clock
Frequen
cy
2.0
7.2
14
5.8
4.8
MHz
4.5
36
56
29
24
6.0
42
66
34
28
t
W(
H)
t
W(L)
Minimum
Pulse
Width (C
LOCK)
2.0
24
75
95
1
10
ns
4
.
5
6
1
51
92
2
6
.
0
5
1
31
61
9
t
W(L)
Minimum
Pulse
Width (C
LEAR
)
2.0
24
75
95
1
10
ns
4
.
5
6
1
51
92
2
6
.
0
5
1
31
61
9
t
s
Minimum
Set-up
Time
2.0
28
75
95
1
10
ns
4
.
5
7
1
51
92
2
6
.
0
6
1
31
61
9
t
h
Minimum
Hold
Time
2.0
0
0
0
ns
4.5
0
0
0
6.0
0
0
0
t
REM
Minimum
Removal
Time
2.0
5
5
5
5
ns
4.5
5
5
5
5
6.0
5
5
5
5
Symbo
l
Param
eter
T
est Conditi
on
V
alue
Unit
V
CC
(V)
T
A
= 25°
C
-40 to 8
5°C
-55 to 1
25°C
Min.
Typ.
Max
.
Min.
Ma
x.
Mi
n.
Max.
C
IN
Input Ca
pacitance
5
.
0
5
1
01
01
0
p
F
C
PD
Power D
issipation
Capacita
nce (note
1)
5.0
40
pF
M74HC174
6/11
TEST CIRCUIT
C
L
= 50p
F
o
r equiva
lent (in
clud
es
j
ig and p
robe ca
pacit
ance)
R
T
= Z
OUT
of pu
ls
e
generator (typically 50
Ω
)
WAVEFORM 1: PROPAGATION DELAY
TIME, MINIMUM
PULSE WIDTH (CLOCK), S
ET
UP
AND
HOLD TIME (n
D TO CLOCK), CLOCK MAXI
M
UM
FRE
Q
UENCY
(f=1
MHz;
5
0%
du
ty cycle)
P1-P3
P4-P6
P7-P9
P10-P11
M74HC174TTR
Mfr. #:
Buy M74HC174TTR
Manufacturer:
STMicroelectronics
Description:
Flip Flops Hex "D" Flip-Flop
Lifecycle:
New from this manufacturer.
Delivery:
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EMS
Payment:
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