MT8808 Data Sheet
3
Zarlink Semiconductor Inc.
Functional Description
The MT8808 is an analog switch matrix with an array size of 8 x 8. The switch array is arranged such that there are
8 columns by 8 rows. The columns are referred to as the Y inputs/outputs and the rows are the X inputs/outputs.
The crosspoint analog switch array will interconnect any X I/O with any Y I/O when turned on and provide a high
degree of isolation when turned off. The control memory consists of a 64 bit write only RAM in which the bits are
selected by the address inputs (AY0-AY2, AX0-AX2). Data is presented to the memory on the DATA input. Data is
asynchronously written into memory whenever the STROBE input is high and is latched on the falling edge of
STROBE. A logical “1” written into a memory cell turns the corresponding crosspoint switch on and a logical “0”
turns the crosspoint off. Only the crosspoint switches corresponding to the addressed memory location are altered
when data is written into memory. The remaining switches retain their previous states. Any combination of X and Y
inputs/outputs can be interconnected by establishing appropriate patterns in the control memory. A logical “1” on
the RESET input will asynchronously return all memory locations to logical “0” turning off all crosspoint switches.
Two voltage reference pins (V
SS
and V
EE
) are provided for the MT8808 to enable switching of negative analog
signals. The range for digital signals is from V
DD
to V
SS
while the range for analog signals is from V
DD
to V
EE
. V
SS
and V
EE
pins can be tied together if a single voltage reference is needed.
Address Decode
The six address inputs along with the STROBE are logically ANDed to form an enable signal for the resettable
transparent latches. The DATA input is buffered and is used as the input to all latches. To write to a location, RESET
must be low while the address and data are set up. Then the STROBE input is set high and then low causing the
data to be latched. The data can be changed while STROBE is high, however, the corresponding switch will turn on
and off in accordance with the DATA input. DATA must be stable on the falling edge of STROBE in order for correct
data to be written to the latch.
20-23 X7, X5,
X3, X1
X7, X5, X3 and X1 Analog (Inputs/Outputs): these are connected to the X7, X5, X3 and
X1 rows of the switch array.
24-26 AX0-
AX2
AX0 - AX2 Address Lines (Inputs).
27,28 AY0, AY1 AY0 and AY1 Address Lines (Inputs).
Pin Description
Pin # Name Description
