NCV7424
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6
A 30 kW resistor in series with a reverse-protection diode is
internally connected between LIN and V
BB
pins.
To avoid that, due to a failure of the application (e.g.
software error, a short to ground, etc.), the LIN bus is
permanently driven dominant and thus blocking all
subsequent communication, the signal on each TxDx pin
passes through an independent timer per LIN channel, which
releases the bus in case TxDx remains
Low for longer than t
TxD_timeout
. The transmission can
continue once the TxDx returns to High logical level. This
is independent on each channel, means permanent dominant
on one channel is not blocking the other channels from
communication.
In case the junction temperature increases above the
thermal shutdown threshold, e.g. due to a short of the LIN
wiring to the battery and high ambient temperature, all four
transmitters are disabled and LIN buses are kept in recessive
state independently of TxDx inputs. RxDx pins are kept Low
during thermal shutdown.
Once the junction temperature decreases below the
thermal shutdown release level, the transmission is enabled
again. RxD pins are released from asserted thermal
shutdown low level immediately when chip is below
thermal shutdown threshold.
As required by SAE J2602, the transceiver behaves safely
below its operating range – it either continues to transmit
correctly (according to its specification) or remains silent
(transmits a recessive state regardless of the TxDx signal).
A battery monitoring circuit in NCV7424 deactivates the
transmitter in normal mode if the V
BB
level drops below
MONL_VBB. Transmission is enabled again when V
BB
reaches MONH_VBB. The internal logic remains in normal
mode and the reception from the LIN line is still possible
even if the battery monitor disables the transmission.
Although the specifications of the monitoring and
power-on-reset levels are overlapping, it is ensured by the
implementation that the monitoring level never falls below
the power-on-reset level.
Normal mode can be entered from either standby or sleep
mode when EN Pin is High for longer than t
enable
. When the
transition is made from standby mode, RxDx is put
high-impedant immediately after EN becomes High (before
the expiration of t
enable
filtering time). Transmission on each
LINx channel is only possible for particular TxDx pin
starting from High to Low level (if TxDx pin is Low when
entering Normal mode, transmission is not enabled).
Sleep Mode
Sleep mode provides extremely low current consumption.
The LIN transceiver is inactive and the battery consumption
is minimized. Only a weak pull-up current source is
internally connected between LIN and V
BB
pins, in order to
minimize current consumption even in case of LIN short to
GND.
Sleep mode can be entered:
• After the voltage level at V
BB
pin rises above its
power-on-reset level. RxDx pins are set high-impedant
after start-up
• From normal mode by assigning a Low logical level to
pin EN for longer than t
disable
. The sleep mode can be
entered even if a permanent short occurs on the LINx
Pin.
If a wake-up event occurs during the transition between
normal and sleep mode (during the t
disable
filtering time), it
will be regarded as a valid wake-up and the chip will enter
standby mode with the appropriate setting of pins RxDx.
LIN Wake−up
Remote (or LIN) wake-up can be recognized on all LINx
pins on NCV7424 when LINx bus is externally driven
dominant for longer than t
LIN_wake
and a rising edge on LIN
occurs afterwards – see Figure 4. Wake-up events can be
exclusively detected in sleep mode or during the transition
from normal mode to sleep mode. Due to timing tolerances,
valid wake-up events beginning shortly before
normal-to-sleep mode transition can be also sometimes
regarded as valid wake−ups.
LIN recessive level
LINx
Detection of Remote Wake−Up
Sleep Mode Standby Mode
LIN dominant level
Figure 4. LIN Bus Wake−up Detection
V
BB
40% V
BB
60% V
BB
t
t
LIN_wake
t
to_stb
