LT3010/LT3010-5
10
30105fe
APPLICATIONS INFORMATION
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be significant enough
to drop capacitor values below appropriate levels. Capaci-
tor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, simi-
lar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor the stress can be induced
by vibrations in the system or thermal transients.
Thermal Considerations
The power handling capability of the device will be lim-
ited by the maximum rated junction temperature (125°C,
LT3010E/LT3010MP or 140°C, LT3010H). The power dissi-
pated by the device will be made up of two components:
1. Output current multiplied by the input/output voltage
differential: I
OUT
•(V
IN
– V
OUT
) and,
2. GND pin current multiplied by the input voltage:
I
GND
•V
IN
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the
two components listed above.
The LT3010 series regulators have internal thermal limiting
designed to protect the device during overload conditions.
For continuous normal conditions the maximum junction
temperature rating of 125°C (LT3010E/LT3010MP) or
140°C (LT3010H) must not be exceeded. It is important
to give careful consideration to all sources of thermal re-
sistance from junction to ambient. Additional heat sources
mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. Measured Thermal Resistance
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE BACKSIDE
2500 sq mm 2500 sq mm 2500 sq mm 40°C/W
1000 sq mm 2500 sq mm 2500 sq mm 45°C/W
225 sq mm 2500 sq mm 2500 sq mm 50°C/W
100 sq mm 2500 sq mm 2500 sq mm 62°C/W
Figure 3. Ceramic Capacitor DC Bias Characteristics
Figure 4. Ceramic Capacitor Temperature Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
30105 F03
20
0
–20
–40
–60
–80
–100
0 4 8 102 6 12 14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100
25 75
30105 F04
–25 0 50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
LT3010/LT3010-5
11
30105fe
APPLICATIONS INFORMATION
The thermal resistance junction-to-case (θ
JC
), measured
at the exposed pad on the back of the die, is 16°C/W.
Continuous operation at large input/output voltage dif-
ferentials and maximum load current is not practical
due to thermal limitations. Transient operation at high
input/output differentials is possible. The approximate
thermal time constant for a 2500sq mm 3/32" FR-4 board
with maximum topside and backside area for one ounce
copper is 3 seconds. This time constant will increase as
more thermal mass is added (i.e. vias, larger board, and
other components).
For an application with transient high power peaks, average
power dissipation can be used for junction temperature
calculations as long as the pulse period is significantly less
than the thermal time constant of the device and board.
Calculating Junction Temperature
Example 1: Given an output voltage of 5V, an input volt-
age range of 24V to 30V, an output current range of 0mA
to 50mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)
•(V
IN(MAX)
– V
OUT
) + (I
GND
•V
IN(MAX)
)
where:
I
OUT(MAX)
= 50mA
V
IN(MAX)
= 30V
I
GND
at (I
OUT
= 50mA, V
IN
= 30V) = 1mA
So:
P=50mA•(30V–5V)+(1mA•30V)=1.28W
The thermal resistance will be in the range of 40°C/W to
62°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
1.31W•50°C/W=65.5°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX
= 50°C + 65.5°C = 115.5°C
Example 2: Given an output voltage of 5V, an input voltage
of 48V that rises to 72V for 5ms(max) out of every 100ms,
and a 5mA load that steps to 50mA for 50ms out of every
250ms, what is the junction temperature rise above ambi-
ent? Using a 500ms period (well under the time constant
of the board), power dissipation is as follows:
P1(48Vin,5mAload)=5mA•(48V–5V)
+(200µA•48V)=0.23W
P2(48Vin,50mAload)=50mA•(48V–5V)
+(1mA•48V)=2.20W
P3(72Vin,5mAload)=5mA•(72V–5V)
+(200µA•72V)=0.35W
P4(72Vin,50mAload)=50mA•(72V–5V)
+(1mA•72V)=3.42W
Operation at the different power levels is as follows:
76% operation at P1, 19% for P2, 4% for P3, and
1% for P4.
P
EFF
= 76%(0.23W) + 19%(2.20W) + 4%(0.35W)
+ 1%(3.42W) = 0.64W
With a thermal resistance in the range of 40°C/W to
62°C/W, this translates to a junction temperature rise above
ambient of 26°C to 38°C.
High Temperature Operation
Care must be taken when designing LT3010H applications to
operate at high ambient temperatures. The LT3010H works
at elevated temperatures but erratic operation can occur
due to unforeseen variations in external components. Some
tantalum capacitors are available for high temperature
operation, but ESR is often several ohms; capacitor ESR
LT3010/LT3010-5
12
30105fe
APPLICATIONS INFORMATION
above 3Ω is unsuitable for use with the LT3010H. Ceramic
capacitor manufacturers (Murata, AVX, TDK, and Vishay
Vitramon at this writing) now offer ceramic capacitors that
are rated to 150°C using an X8R dielectric. Device instability
will occur if output capacitor value and ESR are outside
design limits at elevated temperature and operating DC
voltage bias (see information on capacitor characteristics
under Output Capacitance and Transient Response). Check
each passive component for absolute value and voltage
ratings over the operating temperature range.
Leakages in capacitors or from solder flux left after in-
sufficient board cleaning adversely affects low quiescent
current operation. Consider junction temperature increase
due to power dissipation in both the junction and nearby
components to ensure maximum specifications are not
violated for the LT3010H or external components.
Protection Features
The LT3010 incorporates several protection features which
make it ideal for use in battery-powered circuits. In ad-
dition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device is protected against reverse-input volt-
ages, and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C
(LT3010E/LT3010MP) or 140°C (LT3010H).
The input of the device will withstand reverse voltages
of 80V. Current flow into the device will be limited to less
than 6mA (typically less than 100µA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backward.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the
ADJ pin will act like an open circuit when pulled below
ground, and like a large resistor (typically 100k) in series
with a diode when pulled above ground. If the input is
powered by a voltage source, pulling the ADJ pin below
the reference voltage will cause the device to try and force
the current limit current out of the output. This will cause
the output to go to a unregulated high voltage. Pulling
the ADJ pin above the reference voltage will turn off all
output current.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt-
age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the
1.22V reference when the output is forced to 60V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 53V difference between the OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 10.6k.

LT3010EMS8E-5#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 80Vin, 50mA, LDO in MS8E
Lifecycle:
New from this manufacturer.
Delivery:
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