74LVQ374QSC

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74LVQ374
AC Electrical Characteristics
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
AC Operating Requirements
Capacitance
Note 10: C
PD
is measured at 10 MHz.
T
A
= +25°CT
A
= 40°C to +85°C
Symbol Parameter
V
CC
C
L
= 50 pF C
L
= 50 pF
Units
(V) Min Typ Max Min Max
f
MAX
Maximum Clock Frequency 2.7 55 50
MHz
3.3 ± 0.3 75 70
t
PLH
Propagation Delay 2.7 3.0 11.4 18.3 3.0 19.0
ns
t
PHL
CP to O
n
3.3 ± 0.3 3.0 9.5 13.0 3.0 13.5
t
PZL
Output Enable Time 2.7 3.0 11.4 18.3 3.0 19.0
ns
t
PZH
3.3 ± 0.3 3.0 9.5 13.0 3.0 13.5
t
PHZ
Output Disable Time 2.7 1.0 11.4 20.4 1.0 21.0
ns
t
PLZ
3.3 ± 0.3 1.0 9.5 14.5 1.0 15.0
t
OSHL
Output to Output Skew (Note 9) 2.7 1.0 1.5 1.5
ns
t
OSLH
CP to O
n
3.3 ± 0.3 1.0 1.5 1.5
T
A
= +25°CT
A
= 40°C to +85°C
Symbol Parameter
V
CC
C
L
= 50 pF C
L
= 50 pF
Units
(V) Typ Guaranteed Minimum
t
S
Setup Time, HIGH or LOW 2.7 0 4.0 4.5
ns
D
n
to CP 3.3 ± 0.3 0 3.0 3.0
t
H
Hold Time, HIGH or LOW 2.7 0 1.5 1.5
ns
D
n
to CP 3.3 ± 0.3 0 1.5 1.5
t
W
CP Pulse Width, 2.7 2.4 5.0 6.0
ns
HIGH or LOW 3.3 ± 0.3 2.0 4.0 4.0
Symbol Parameter Typ Units Conditions
C
IN
Input Capacitance 4.5 pF V
CC
= Open
C
PD
(Note 10) Power Dissipation Capacitance 39 pF V
CC
= 3.3V
5 www.fairchildsemi.com
74LVQ374
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
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74LVQ374
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D

74LVQ374QSC

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE SNGL 8BIT 20QSOP
Lifecycle:
New from this manufacturer.
Delivery:
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