LT3954
9
3954fa
For more information www.linear.com/3954
PIN FUNCTIONS
CTRL (Pin 31): Current Sense Threshold Adjustment Pin.
Constant current regulation point V
ISP-ISN
is one-fourth
V
CTRL
plus an offset for 0V ≤ CTRL ≤ 1V. For CTRL >
1.2V the V
ISP-ISN
current regulation point is constant at
the full-scale value of 250mV. For 1V ≤ CTRL ≤ 1.2V, the
dependence of V
ISP-ISN
upon CTRL voltage transitions from
a linear function to a constant value, reaching 98% of full-
scale value by CTRL = 1.1V. Do not leave this pin open.
V
REF
(Pin 32): Voltage Reference Output Pin, Typically 2V.
This pin drives a resistor divider for the CTRL pin, either
for analog dimming or for temperature limit/compensation
of LED load. It can be bypassed with 10nF or greater, or
less than 50pF. Can supply up to 185µA (typical).
PWM (Pin 33): A signal low turns off switcher, idles the
oscillator and disconnects the VC pin from all internal
loads. PWMOUT pin follows the PWM pin, except in fault
conditions. The PWM pin can be driven with a digital signal
to cause pulse width modulation (PWM) dimming of an
LED load. The digital signal should be capable of sourcing
or sinking 200μA at the high and low thresholds. During
start-up when DIM/SS is below 1V, the first rising edge
of PWM enables switching which continues until V
ISP-ISN
≥ 25mV or DIM/SS ≥ 1V. Connecting a capacitor from
PWM pin to GND invokes a self-driving oscillator where
internal pull-up and pull-down currents set a duty ratio for
the PWMOUT pin for dimming LEDs. The capacitor must
be placed close to the IC. The magnitudes of the pull-up/
down currents are set by the current in the DIM/SS pin.
The capacitor on PWM sets the frequency of the dimming
signal. For hiccup mode response to output short-circuit
faults, connect this pin as shown in the application titled
Boost LED Driver with Output Short-Circuit Protection. If
not used, connect the PWM pin to INTV
CC
.
VMODE (Pin 34): An open-drain pull-down on this pin
asserts if the FB input is greater than the FB regulation
voltage (V
FB
) minus 50mV (typical) AND the difference
between current sense inputs ISP and ISN is less than
25mV. To function, the pin requires an external pull-up
resistor, usually to INTV
CC
. When the PWM input is low
and the DC/DC converter is idle, the VMODE condition is
latched to the last valid state when the PWM input was
high. When PWM input goes high again, the VMODE pin
will be updated. This pin may be used to report transi
-
tion from constant current regulation to constant voltage
regulation modes
,
for instance in a charger or current
limited voltage supply.
DIM/SS (Pin 35): Soft-Start and PWM Dimming Signal
Generator Programming Pin. This pin modulates switching
regulator frequency and compensation pin voltage (VC)
clamp when it is below 1V. The soft-start interval is set
with an external capacitor and the DIM/SS pin charging
current. The pin has an internal 12μA (typical) pull-up
current source. The soft-start pin is reset to GND by an
undervoltage condition (detected at the EN/UVLO pin),
INTV
CC
undervoltage, overcurrent event sensed at ISP/
ISN, or thermal limit. After initial start-up with EN/UVLO,
DIM/SS is forced low until the first PWM rising edge. When
DIM/SS reaches the steady-state voltage (~1.17V), the
charging current (sum of internal and external currents) is
sensed and used to set the PWM pin charging and discharge
currents and threshold hysteresis. In this manner, the SS
charging current sets the duty cycle of the PWM signal
generator associated with the PWM pin. This pin should
always have a capacitor to GND, minimum 560pF value,
when used with the PWM signal generator function. See
typical performance curves for details on the variation of
PWM pin parameters with SS charging current. Place the
capacitor close to the IC.
RT (Pin 36): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open. Place the resistor close to the IC.
GND (Exposed Pad Pin 37, Pins 4, 24): Ground. Solder
the exposed pads directly to the ground plane.
SW (Exposed Pad Pin 38, Pins 8, 9, 20, 21): Drain of
Internal Power N-channel MOSFET.
