ADP1720
Rev. A | Page 9 of 16
–100
10 10M
PSRR (dB)
0
FREQUENCY (Hz)
100 1k 10k 100k 1M
V
IN
= 8V
V
OUT
= 5V
C
OUT
= 1µF
V
RIPPLE
= 50mV
–10
–20
–30
–40
–50
–60
–70
–80
–90
1mA
10mA
100µA
06111-015
Figure 15. Power Supply Rejection Ratio vs. Frequency
(5.0 V Fixed Output)
TIME (20µs/DIV)
10mV/DI
V
1
V
IN
= 12V
V
OUT
= 1.6V
C
IN
= 1µF
C
OUT
= 1µF
LOAD STEP FROM 2.5mA TO 47.5mA
06111-016
V
OUT
Figure 16. Load Transient Response
TIME (100µs/DIV)
10mV/DI
V
2
2V/DI
V
1
V
OUT
= 5V
C
IN
= 1µF
C
OUT
= 1µF
I
LOAD
= 50mA
06111-017
V
IN
STEP FROM 6V TO 7V
V
OUT
Figure 17. Line Transient Response
TIME (40µs/DIV)
2V/DI
V
2
5V/DI
V
1
V
IN
= 12V
V
OUT
= 5V
C
IN
= 1µF
C
OUT
= 1µF
I
LOAD
= 50mA
06111-018
EN
V
OUT
Figure 18. Start-Up Time
ADP1720
Rev. A | Page 10 of 16
THEORY OF OPERATION
The ADP1720 is a low dropout, BiCDMOS linear regulator that
operates from a 4 V to 28 V input rail and provides up to 50 mA
of output current. Ground current in shutdown mode is typically
700 nA. The ADP1720 is stable and provides high power supply
rejection ratio (PSRR) and excellent line and load transient
response with just a small 1 μF ceramic output capacitor.
REFERENCE
CURRENT LIMIT
THERMAL PROTECT
SHUTDOWN
OUT
GND/ADJ
IN
EN
19
GND
06111-0
Figure 19. Internal Block Diagram
Internally, the ADP1720 consists of a reference, an error ampli-
fier, a feedback voltage divider, and a DMOS pass transistor.
Output current is delivered via the DMOS pass device, which is
controlled by the error amplifier. The error amplifier compares
the reference voltage with the feedback voltage from the output
and amplifies the difference. If the feedback voltage is lower than
the reference voltage, the gate of the DMOS device is pulled
lower, allowing more current to pass and increasing the output
voltage. If the feedback voltage is higher than the reference
voltage, the gate of the PNP device is pulled higher, allowing
less current to pass and decreasing the output voltage.
The ADP1720 is available in two versions, one with fixed output
voltage options (see Figure 1) and one with an adjustable output
voltage (see Figure 2). The fixed output voltage options are set
internally to either 5.0 V or 3.3 V, using an internal feedback
network. The adjustable output voltage can be set to between
1.225 V and 5.0 V by an external voltage divider connected from
OUT to ADJ. The ADP1720 uses the EN pin to enable and
disable the OUT pin under normal operating conditions. When
EN is high, OUT turns on; when EN is low, OUT turns off. For
automatic startup, EN can be tied to IN.
ADJUSTABLE OUTPUT VOLTAGE
(ADP1720 ADJUSTABLE)
The ADP1720 adjustable version can have its output voltage
set over a 1.225 V to 5.0 V range. The output voltage is set by
connecting a resistive voltage divider from OUT to ADJ. The
output voltage is calculated using the equation
V
OUT
= 1.225 V (1 + R1/R2) (1)
where:
R1 is the resistor from OUT to ADJ.
R2 is the resistor from ADJ to GND.
To make calculation of R1 and R2 easier, Equation 1 can be
rearranged as follows:
R1 = R2 [(V
OUT
/1.225) – 1] (2)
The maximum bias current into ADJ is 100 nA; therefore,
when less than 0.5% error is due to the bias current, use values
less than 60 kΩ for R2.
ADP1720
Rev. A | Page 11 of 16
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP1720 is designed for operation with small, space-saving
ceramic capacitors, but it functionswith most commonly used
capacitors as long as care is taken about the effective series
resistance (ESR) value. The ESR of the output capacitor affects
stability of the LDO control loop. A minimum of 1 μF capacitance
with an ESR of 500 mΩ or less is recommended to ensure sta-
bility of the ADP1720. Transient response to changes in load
current is also affected by output capacitance. Using a larger
value of output capacitance improves the transient response of
the ADP1720 to large changes in load current. Figure 20 and
Figure 21 show the transient responses for output capacitance
values of 1 μF and 10 μF, respectively.
TIME (2µs/DIV)
10mV/DI
V
1
V
IN
= 12V
V
OUT
= 1.6V
C
IN
= 1µF
C
OUT
= 1µF
LOAD STEP FROM 2.5mA TO 47.5mA
06111-020
Figure 20. Output Transient Response, 1 μF
TIME (2µs/DIV)
10mV/DI
V
1
V
IN
= 12V
V
OUT
= 1.6V
C
IN
= 10µF
C
OUT
= 10µF
LOAD STEP FROM 2.5mA TO 47.5mA
1-0210611
Figure 21. Output Transient Response, 10 μF
Input Bypass Capacitor
Connecting a 1 μF capacitor from IN to GND reduces the cir-
cuit sensitivity to printed circuit board (PCB) layout, especially
when encountering long input traces or high source impedance.
If greater than 1 μF of output capacitance is required, it is
recommended that the input capacitor be increased to match it.
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the
ADP1720, as long as they meet the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufac-
tured with a variety of dielectrics, each with different behavior
over temperature and applied voltage. Capacitors must have a
dielectric adequate to ensure the minimum capacitance over
the necessary temperature range and dc bias conditions. X5R
or X7R dielectrics with a voltage rating of 6.3 V or 10 V are
recommended for the output capacitor. X5R or X7R dielectrics
with a voltage rating of 50 V or higher are recommended for the
input capacitor.
Y5V and Z5U dielectrics are not recommended, due to their
poor temperature and dc bias characteristics.
CURRENT LIMIT AND THERMAL OVERLOAD
PROTECTION
Current limit and thermal overload protection circuits on the
ADP1720 protect the part from damage caused by excessive power
dissipation. The ADP1720 is designed to current limit when
the output load reaches 90 mA (typical). When the output
load exceeds 90 mA, the output voltage is reduced to maintain
a constant current limit.
Thermal overload protection is included, which limits the junction
temperature to a maximum of 150°C (typical). Under extreme
conditions (that is, high ambient temperature and power dissipa-
tion), when the junction temperature starts to rise above 150°C,
the output is turned off, reducing the output current to zero.
When the junction temperature drops below 135°C, the output is
turned on again, and output current is restored to its nominal value.
Consider the case where a hard short from OUT to GND occurs.
At first, the ADP1720 current limits so that only 90 mA is
conducted into the short. If self-heating of the junction is
great enough to cause its temperature to rise above 150°C,
thermal shutdown activates, turning off the output and
reducing the output current to zero. As the junction
temperature cools and drops below 13C, the output turns on
and conducts 90 mA into the short, again causing the junction
temperature to rise above 150°C. This thermal oscillation
between 135°C and 150°C causes a current oscillation between
90 mA and 0 mA, which continues as long as the short
remains at the output.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so that junction temperatures do not exceed 125°C.

ADP1720ARMZ-R7

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Linear Voltage Regulators 50mA Hi VTG Micropwr
Lifecycle:
New from this manufacturer.
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