FDS6894A

October 2001
2001 Fairchild Semiconductor Corporation
FDS6894A Rev C (W)
FDS6894A
Dual N-Channel Logic Level PWM Optimized PowerTrench
MOSFET
General Description
These N-Channel Logic Level MOSFETs are produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
superior switching performance.
These devices are well suited for low voltage and
battery powered applications where low in-line power
loss and fast switching are required.
Features
8 A, 20 V. R
DS(ON)
= 17 m @ V
GS
= 4.5 V
R
DS(ON)
= 20 m @ V
GS
= 2.5 V
R
DS(ON)
= 30 m @ V
GS
= 1.8 V
Low gate charge (17 nC)
High performance trench technology for extremely
low R
DS(ON)
High power and current handling capability
S
D
S
S
SO-8
D
D
D
G
D2
D2
D1
D1
S2
G2
S1
G1
Pin 1
SO-8
4
3
2
1
5
6
7
8
Q1
Q2
Absolute Maximum Ratings T
A
=25
o
C unless otherwise noted
Symbol Parameter Ratings Units
V
DSS
Drain-Source Voltage 20 V
V
GSS
Gate-Source Voltage
± 8
V
I
D
Drain Current – Continuous (Note 1a) 8 A
– Pulsed 32
Power Dissipation for Dual Operation 2
Power Dissipation for Single Operation (Note 1a) 1.6
(Note 1b)
1
P
D
(Note 1c)
0.9
W
T
J
, T
STG
Operating and Storage Junction Temperature Range –55 to +150
°C
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
R
θJC
Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS6894A FDS6894A 13’’ 12mm 2500 units
FDS6894A
FDS6894A Rev C (W)
Electrical Characteristics T
A
= 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage V
GS
= 0 V, I
D
= 250 µA 20 V
BVDSS
T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250 µA, Referenced to 25°C
13
mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 16 V, V
GS
= 0 V
V
DS
= 16 V, V
GS
= 0 V, T
J
= 55°C
1
10
µA
I
GSSF
Gate–Body Leakage, Forward V
GS
= 8 V, V
DS
= 0 V 100
nA
I
GSSR
Gate–Body Leakage, Reverse V
GS
= – 8 V, V
DS
= 0 V –100
nA
On Characteristics (Note 2)
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 250 µA 0.6 0.8 1.5 V
VGS(th)
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= 250 µA, Referenced to 25°C
–3
mV/°C
R
DS(on)
Static Drain–Source
On–Resistance
V
GS
= 4.5 V, I
D
= 8 A
V
GS
= 2.5 V, I
D
= 7 A
V
GS
= 1.8 V, I
D
= 6 A
V
GS
= 4.5 V, I
D
= 8 A,T
J
= 125°C
13
16
21
18
17
20
30
25
m
I
D(on)
On–State Drain Current V
GS
= 4.5V, V
DS
= 5 V 16 A
g
FS
Forward Transconductance V
DS
= 5 V, I
D
= 8 A 44 S
Dynamic Characteristics
C
iss
Input Capacitance 1676 pF
C
oss
Output Capacitance 288 pF
C
rss
Reverse Transfer Capacitance
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
146 pF
Switching Characteristics (Note 2)
t
d(on)
Turn–On Delay Time 10 20 ns
t
r
Turn–On Rise Time 14 25 ns
t
d(off)
Turn–Off Delay Time 33 53 ns
t
f
Turn–Off Fall Time
V
DD
= 10 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
12 22 ns
Q
g
Total Gate Charge 17 24 nC
Q
gs
Gate–Source Charge 2.8 nC
Q
gd
Gate–Drain Charge
V
DS
= 10 V, I
D
= 8 A,
V
GS
= 4.5 V
3.3 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current 1.3 A
V
SD
Drain–Source Diode Forward
Voltage
V
GS
= 0 V, I
S
= 1.3 A (Note 2) 0.7 1.2 V
Notes:
1. R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 78°C/W when
mounted on a 0.5in
2
pad of 2 oz copper
b) 125°C/W when
mounted on a 0.02
in
2
pad of 2 oz
copper
c) 135°C/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6894A
FDS6894A Rev C (W)
Typical Characteristics
0
10
20
30
40
50
0 0.5 1 1.5 2 2.5 3 3.5
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
V
GS
= 4.5V
1.8V
2.5V
2.0V
3.0V
0.8
1
1.2
1.4
1.6
1.8
2
0 10 20 30 40 50
I
D
, DIRAIN CURRENT (A)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 1.8V
4.5V
3.0V
2.5V
3.5V
2.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50 -25 0 25 50 75 100 125 150
T
J
, JUNCTION TEMPERATURE (
o
C)
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 8A
V
GS
= 4.5V
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
1 2 3 4 5
V
GS
, GATE TO SOURCE VOLTAGE (V)
R
DS(ON)
, ON-RESISTANCE (OHM)
I
D
= 4A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
5
10
15
20
25
30
0.5 0.8 1.1 1.4 1.7 2
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
T
A
= -55
o
C 25
o
C
125
o
C
V
DS
= 5V
0.0001
0.001
0.01
0.1
1
10
0 0.2 0.4 0.6 0.8 1
V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
I
S
, REVERSE DRAIN CURRENT (A)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6894A

FDS6894A

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
MOSFET Dual NCh Logic Level PWM; PowerTrench
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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