LTC4414IMS8#TRPBF

7
LTC4414
4414fc
APPLICATIO S I FOR ATIO
WUUU
Introduction
The system designer will find the LTC4414 useful in a
variety of cost and space sensitive power control applica-
tions that include low loss diode OR’ing, fully automatic
switchover from a primary to an auxiliary source of power,
microcontroller controlled switchover from a primary to
an auxiliary source of power, charging of multiple batter-
ies from a single charger and high side power switching.
External P-Channel MOSFET Transistor Selection
Important parameters for the selection of MOSFETs are
the maximum drain-source voltage V
DS(MAX),
threshold
voltage V
GS(VT)
and on-resistance R
DS(ON)
.
The maximum allowable drain-source voltage, V
DS(MAX),
must be high enough to withstand the maximum drain-
source voltage seen in the application.
The maximum gate drive voltage for the primary MOSFET
is set by the smaller of the V
IN
supply voltage or the internal
clamping voltage V
G(ON).
A logic level MOSFET is com-
monly used, but if a low supply voltage limits the gate
voltage, a sub-logic level threshold MOSFET should be
considered. The maximum gate drive voltage for the
auxiliary MOSFET, if used, is determined by the external
resistor connected to the STAT pin.
As a general rule, select a MOSFET with a low enough
R
DS(ON)
to obtain the desired V
DS
while operating at full
load current and an achievable V
GS
. The MOSFET normally
operates in the linear region and acts like a voltage
controlled resistor. If the MOSFET is grossly undersized,
it can enter the saturation region and a large V
DS
may
result. However, the drain-source diode of the MOSFET, if
forward biased, will limit V
DS
. A large V
DS
, combined with
the load current, will likely result in excessively high
MOSFET power dissipation. Keep in mind that the LTC4414
will regulate the forward voltage drop across the primary
MOSFET at 20mV if R
DS(ON)
is low enough. The required
R
DS(ON)
can be calculated by dividing 0.02V by the load
current in amps. Achieving forward regulation will mini-
mize power loss and heat dissipation, but it is not a
necessity. If a forward voltage drop of more than 20mV is
acceptable then a smaller MOSFET can be used, but must
be sized compatible with the higher power dissipation.
Care should be taken to ensure that the power dissipated
is never allowed to rise above the manufacturer’s recom-
mended maximum level. The auxiliary MOSFET power
switch, if used, has similar considerations, but its V
GS
can
be tailored by resistor selection. When choosing the
resistor value consider the full range of STAT pin current
(I
S(SNK)
) that may flow through it.
V
IN
and SENSE Pin Bypass Capacitors
Many types of capacitors, ranging from 0.1µF to 10µF and
located close to the LTC4414, will provide adequate V
IN
bypassing if needed. Voltage droop can occur at the load
during a supply switchover because some time is required
to turn on the MOSFET power switch. Factors that deter-
mine the magnitude of the voltage droop include the
supply rise and fall times, the MOSFET’s characteristics,
the value of C
OUT
and the load current. Droop can be made
insignificant by the proper choice of C
OUT
,
since the droop
is inversely proportional to the capacitance. Bypass ca-
pacitance for the load also depends on the application’s
dynamic load requirements and typically ranges from 1µF
to 47µF. In all cases, the maximum droop is limited to the
drain source diode forward drop inside the MOSFET.
Caution must be exercised when using multilayer ceramic
capacitors. Because of the self resonance and high Q
characteristics of some types of ceramic capacitors, high
voltage transients can be generated under some start-up
conditions such as connecting a supply input to a hot
power source. To reduce the Q and prevent these tran-
sients from exceeding the LTC4414’s absolute maximum
voltage rating, the capacitor’s ESR can be increased by
adding up to several ohms of resistance in series with the
ceramic capacitor. Refer to Application Note 88.
The selected capacitance value and capacitor’s ESR can be
verified by observing V
IN
and SENSE for acceptable volt-
age transitions during dynamic conditions over the full
load current range. This should be checked with each
power source as well. Ringing may indicate an incorrect
bypass capacitor value and/or too low an ESR.
V
IN
and SENSE Pin Usage
Since the analog controller’s thresholds are small (±20mV),
the V
IN
and SENSE pin connections should be made in a
8
LTC4414
4414fc
way to avoid unwanted I • R drops in the power path. Both
pins are protected from negative voltages.
GATE Pin Usage
The GATE pin controls the external P-channel MOSFET
connected between the V
IN
and SENSE pins when the load
current is supplied by the power source at V
IN
. In this
mode of operation, the internal current source, which is
responsible for pulling the GATE pin up, is limited to a few
microamps (I
G(SRC)
). If external opposing leakage cur-
rents exceed this, the GATE pin voltage will reach the
clamp voltage (V
GON
) and V
DS
will be smaller. The internal
current sink, which is responsible for pulling the GATE pin
down, has a higher current capability (I
G(SNK)
). With an
auxiliary supply input pulling up on the SENSE pin and
exceeding the V
IN
pin voltage by 20mV (V
RTO
), the device
enters the reverse turn-off mode and a much stronger
current source is available to oppose external leakage
currents and turn off the MOSFET (V
GOFF
).
While in forward regulation, if the on resistance of the
MOSFET is too high to maintain forward regulation, the
GATE pin will maximize the MOSFET’s V
GS
to that of the
clamp voltage (V
GON
). The clamping action takes place
between V
IN
and the GATE pin.
STAT Pin Usage
During normal operation, the open-drain STAT pin can be
biased at any voltage between ground and 36V regardless
of the supply voltage to the LTC4414. It is usually con-
nected to a resistor whose other end connects to a voltage
source. In the forward regulation mode, the STAT pin will
be open (I
S(OFF)
). When a wall adaptor input or other
auxiliary supply is connected to that input, and the voltage
on SENSE is higher than V
IN
+ 20mV (V
RTO
),
the system is
in the reverse turn-off mode. During this mode of opera-
tion the STAT pin will sink at least 50µA of current
(I
S(SNK)
). This will result in a voltage change across the
resistor, depending on the resistance, which is useful to
turn on an auxiliary P-channel MOSFET or signal to a
microcontroller that an auxiliary power source is con-
nected. External leakage currents, if significant, should be
accounted for when determining the voltage across the
resistor when the STAT pin is either on or off.
CTL Pin Usage
This is a digital control input pin with low threshold
voltages (V
IL,
V
IH
) for use with logic powered from as little
as 1V. During normal operation, the CTL pin can be biased
at any voltage between ground and 36V, regardless of the
supply voltage to the LTC4414. A logical high input on this
pin forces the gate to source voltage of the primary
P-channel MOSFET power switch to a small voltage (V
GOFF
).
This will turn the MOSFET off and no current will flow from
the primary power input at V
IN
if the MOSFET is configured
so that the drain to source diode is not forward biased. The
high input also forces the STAT pin to sink at least 50µA of
current (I
S(SNK)
). See the Typical Applications for various
examples on using the STAT pin. A 3.5µA internal pull-
down current (I
CTL
) on the CTL pin will insure a logical low
level input if the pin should be open.
Protection
Most of the application circuits shown provide some
protection against supply faults such as shorted, low or
reversed supply inputs. The fault protection does not
protect shorted supplies but can isolate other supplies and
the load from faults. A necessary condition of this protec-
tion is for all components to have sufficient breakdown
voltages. In some cases, if protection of the auxiliary input
(sometimes referred to as the wall adapter input) is not
required, then the series diode or MOSFET may be
eliminated.
Internal protection for the LTC4414 is provided to prevent
damaging pin currents and excessive internal self heating
during a fault condition. These fault conditions can be a
result of V
IN
, SENSE, GATE or CTL pins shorted to ground
or to a power source that is within the pin’s absolute
maximum voltage limits. Both the V
IN
and SENSE pins are
capable of being taken significantly below ground without
current drain or damage to the IC (see Absolute Maximum
Voltage Limits). This feature allows for limited reverse-
battery condition without current drain or damage. This
internal protection is not designed to prevent overcurrent
or overheating of external components.
APPLICATIO S I FOR ATIO
WUUU
9
LTC4414
4414fc
V
IN
GND
CTL
SENSE
GATE
STAT
7
3
2
6
8
1
LTC4414
BATTERY
CHARGER
P-CHANNEL
MOSFET
C
OUT
TO LOAD
STATUS OUTPUT
IS LOW WHEN A
WALL ADAPTER
IS PRESENT
47k
*DRAIN-SOURCE DIODE OF MOSFET
4414 F02
V
CC
BATTERY
CELL(S)
*
WALL
ADAPTER
INPUT
V
IN
GND
CTL
SENSE
GATE
STAT
7
3
2
6
8
1
LTC4414
PRIMARY
P-CHANNEL
MOSFET
C
OUT
TO LOAD
STATUS OUTPUT
DROPS WHEN A
WALL ADAPTER
IS PRESENT
47k
4414 F01
BATTERY
CELL(S)
WALL
ADAPTER
INPUT
*
*
AUXILIARY
P-CHANNEL
MOSFET
*DRAIN-SOURCE DIODE OF MOSFET
Automatic PowerPath Control
The applications shown in Figures 1 and 2 and the typical
application shown on the first page of this data sheet are
automatic ideal diode controllers that require no assis-
tance from a microcontroller. Each of these will automati-
cally connect the higher supply voltage, after accounting
for certain diode forward voltage drops, to the load with
application of the higher supply voltage. These circuits are
not recommended for load sharing.
The typical application shown on the first page on this data
sheet illustrates an application circuit for automatic
switchover of a load between a battery and a wall adapter
or other power input. With application of the battery, the
load will initially be pulled up by the drain-source diode of
the P-channel MOSFET. As the LTC4414 comes into
action, it will control the MOSFET’s gate to turn it on and
reduce the MOSFET’s voltage drop from a diode drop to
20mV. The system is now in the low loss forward regula-
tion mode. Should the wall adapter input be applied, the
Schottky diode will pull up the SENSE pin, connected to the
load, above the battery voltage and the LTC4414 will turn
the MOSFET off. The STAT pin will then sink current
indicating an auxiliary input is connected. The battery is
now supplying no load current and all the load current
flows through the Schottky diode. A silicon diode could be
used instead of the Schottky, but will result in higher
power dissipation and heating due to the higher forward
voltage drop.
Figure 1 illustrates an application circuit for automatic
switchover of load between a battery and a wall adapter
that features lowest power loss. Operation is similar to the
Typical Application on the front page except that an
auxiliary P-channel MOSFET replaces the diode. The
STAT pin is used to turn on the MOSFET once the SENSE
pin voltage exceeds the battery voltage by 20mV. When
the wall adapter input is applied, the drain-source diode of
the auxiliary MOSFET will turn on first to pull up the
SENSE pin and turn off the primary MOSFET followed by
turning on of the auxiliary MOSFET. Once the auxiliary
MOSFET has turned on the voltage drop across it can be
very low depending on the MOSFET’s characteristics.
Figure 2 illustrates an application circuit for the automatic
switchover of a load between a battery and a wall adapter
in the comparator mode. It also shows how a battery
charger can be connected. This circuit differs from Figure
1 in the way the SENSE pin is connected. The SENSE pin
is connected directly to the auxiliary power input and not
the load. This change forces the LTC4414’s control cir-
cuitry to operate in an open-loop comparator mode. While
the battery supplies the system, the GATE pin voltage will
be forced to its lowest clamped potential, instead of being
regulated to maintain a 20mV drop across the MOSFET.
This has the advantages of minimizing power loss in the
MOSFET by minimizing its R
ON
and not having the influ-
ence of a linear control loop’s dynamics. A possible
disadvantage is if the auxiliary input ramps up slow
enough the load voltage will initially droop before rising.
TYPICAL APPLICATIO S
U
Figure 1. Automatic Switchover of Load Between a Battery and a
Wall Adapter with Auxiliary P-Channel MOSFET for Lowest Loss
Figure 2. Automatic Switchover of Load Between
a Battery and a Wall Adapter in Comparator Mode

LTC4414IMS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC 36V, L Loss PwrPath Cntr for Lrg PFETs
Lifecycle:
New from this manufacturer.
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