19
FN8173.4
April 17, 2007
TIMING DIAGRAMS
Start and Stop Timing
Input Timing
Output Timing
t
SU:STA
t
HD:STA
t
SU:STO
SCL
SDA
t
R
(START) (STOP)
t
F
t
R
t
F
SCL
SDA
t
HIGH
t
LOW
t
CYC
t
HD:DAT
t
SU:DAT
t
BUF
SCL
SDA
t
DH
t
AA
X9269
20
FN8173.4
April 17, 2007
XDCP Timing (for All Load Instructions)
Write Protect and Device Address Pins Timing
SCL
SDA
VWx
(STOP)
LSB
t
WRL
SDA
SCL
...
...
...
WP
A0, A1
t
SU:WPA
t
HD:WPA
(START) (STOP)
(Any Instruction)
X9269
21
FN8173.4
April 17, 2007
APPLICATIONS INFORMATION
Basic Configurations of Electronic Potentiometers
Application Circuits
V
R
RW
+V
R
I
Three terminal Potentiometer;
Variable voltage divider
Two terminal Variable Resistor;
Variable current
Noninverting Amplifier Voltage Regulator
Offset Voltage Adjustment Comparator with Hysterisis
+
V
S
V
O
R
2
R
1
V
O
= (1+R
2
/R
1
)V
S
R
1
R
2
I
adj
V
O
(REG) = 1.25V (1+R
2
/R
1
)+I
adj
R
2
V
O
(REG)V
IN
317
+
V
S
V
O
R
2
R
1
V
UL
= {R
1
/(R
1
+R
2
)} V
O
(max)
RL
L
= {R
1
/(R
1
+R
2
)} V
O
(min)
100kΩ
10kΩ10kΩ
10kΩ
-12V+12V
TL072
+
V
S
V
O
R
2
R
1
}
}
10kΩ
10kΩ
V
CC
X9269

X9269US24IZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs DL DCP 50KOHM 256 TAPS 2-WIRE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union