6.42
9
IDT71V67602, IDT71V67802, 256K x 36, 512K x 18, 3.3V Synchronous Commercial and Industrial Temperature Ranges
SRAMs with 2.5V I/O, Pipelined Outputs, Single Cycle Deselect
Symbol Parameter Test Conditions Min. Max. Unit
|I
LI| Input Leakage Current VDD = Max., VIN = 0V to VDD
___
5µA
|I
LZZ|
ZZ and LBO Input Leakage Current
(1)
VDD = Max., VIN = 0V to VDD
___
30 µA
|I
LO| Output Leakage Current VOUT = 0V to VDDQ, Device Deselected
___
5µA
V
OL Output Low Voltage IOL = +6mA, VDD = Min.
___
0.4 V
V
OH Output High Voltage IOH = -6mA, VDD = Min. 2.0
___
V
5311 tbl 08
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range
(1)
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 3.3V ± 5%)
Figure 2. Lumped Capacitive Load, Typical Derating
Figure 1. AC Test Load
AC Test LoadAC Test Conditions
(VDDQ = 2.5V)
NOTE:
1. The LBO pin will be internally pulled to V
DD if it is not actively driven in the application and the ZZ pin will be internally pulled to VSS if not actively driven.
NOTES:
1. All values are maximum guaranteed values.
2. At f = f
MAX, inputs are cycling at the maximum frequency of read cycles of 1/tCYC while ADSC = LOW; f=0 means no input lines are changing.
3. For I/Os VHD = VDDQ - 0.2V, VLD = 0.2V. For other inputs VHD = VDD - 0.2V, VLD = 0.2V.
V
DDQ
2
50Ω
I/O
Z
0
=50Ω
5311 drw 06
,
1
2
3
4
20 30 50 100 200
Δt
CD
(Typical, ns)
Capacitance (pF)
80
5
6
5311 drw 07
,
Symbol Parameter Test Conditions
166MHz 150MHz 133MHz Unit
Com'l Only Com'l Ind Com'l Ind
I
DD
Operating Power Supply Current
Device Selected, Outputs Open, V
DD
= Max.,
V
DDQ
= Max., V
IN
> V
IH
or < V
IL
, f = f
MAX
(2)
340 305 325 260 280 mA
I
SB1
CMOS Standby Power Supply
Current
Device Deselected, Outputs Open, V
DD
= Max.,
V
DDQ
= Max., V
IN
> V
HD
or < V
LD
, f = 0
(2,3)
50 50 70 50 70 mA
I
SB2
Clock Running Power
Supply Current
Device Deselected, Outputs Open, V
DD
= Max.,
V
DDQ
= Max., V
IN
> V
HD
or < V
LD
, f = f
MAX
(2,3)
160 155 175 150 170 mA
I
ZZ
Full Sleep Mode Supply Current
ZZ >
V
HD,
V
DD
= Max.
50 50 70 50 70 mA
5311 tbl 09
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
AC Test Load
0 to 2.5V
2ns
V
DDQ
/2
V
DDQ
/2
See Figure 1
5311 tbl 10