TC4467/TC4468/TC4469
DS21425C-page 10 2001-2012 Microchip Technology Inc.
A resistive-load-caused dissipation for supply-
referenced loads is a function of duty cycle, load
current and output voltage. The power dissipation is
EQUATION
Quiescent power dissipation depends on input signal
duty cycle. Logic HIGH outputs result in a lower power
dissipation mode, with only 0.6 mA total current drain
(all devices driven). Logic LOW outputs raise the
current to 4 mA maximum. The quiescent power
dissipation is:
EQUATION
Transition power dissipation arises in the complimen-
tary configuration (TC446X) because the output stage
N-channel and P-channel MOS transistors are ON
simultaneously for a very short period when the output
changes. The transition power dissipation is
approximately:
EQUATION
Package power dissipation is the sum of load,
quiescent and transition power dissipations. An
example shows the relative magnitude for each term:
Maximum operating temperature is:
EQUATION
FIGURE 4-1: Switching Time Test Circuit.
P
L
DV
O
I
L
=
I
L
Load Current=
V
O
Device Output Voltage=
D Duty Cycle=
P
Q
V
S
DI
H
1D–I
L
+=
I
L
Quiescent Current with all outputs HIGH=
I
H
Quiescent Current with all outputs LOW=
D Duty Cycle=
V
S
Supply Voltage=
(4 mA max.)
(0.6 mA max.)
Note: Ambient operating temperature should not
exceed +85°C for "EJD" device or +125°C
for "MJD" device.
P
T
fV
s
10 10
9–
=
V
S
15 V=
C 1000 pF Capacitive Load=
D50%=
f200kHz=
P
D
Package Power Dissipation=
P
L
P
Q
P
T
++=
45mW 35mW 30mW++=
110mW=
T
J
JA
P
D
– 141C=
JA
Junction-to-ambient thernal resistance=
T
J
Maximum allowable junction temperature=
(+150C
(83.3C/W) 14-pin plastic package
V
OUT
470 pF
1B
1A
2B
2A
3B
3A
4B
4A
1µF Film
0.1 µF Ceramic
90%
10%
10%
10%
90%
+5 V
Input
(A, B)
V
DD
Output
0V
0V
90%
1
2
3
4
5
6
8
9
7
10
11
12
13
14
V
DD
t
R
t
D1
t
F
t
D2
Input: 100 kHz,
square wave,
t
RISE
= t
FALL
10 nsec
