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74ALVC16244APAG8

P1-P3P4-P6
INDUSTRIAL TEMPERATURE RANGE
4
IDT74ALVC16244A
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SWITCHING CHARACTERISTICS
(1)
VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit
t
PLH Propagation Delay 1 4.4 — 4 1 3.6 ns
tPHL xA to xBx
t
PZH Output Enable Time 1 6.3 — 615ns
tPZL OE to xBx
tPHZ Output Disable Time 1 5.8 — 5.2 1 5 ns
tPLZ OE to xBx
t
SK(o) Output Skew
(2)
— ————500 ps
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V
Symbol Parameter Test Conditions Typical Typical Unit
CPD Power Dissipation Capacitance Outputs enabled CL = 0pF, f = 10Mhz 16 19 pF
C
PD Power Dissipation Capacitance Outputs disabled 4 5
INDUSTRIAL TEMPERATURE RANGE
IDT74ALVC16244A
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
5
Open
V
LOAD
GND
V
CC
Pulse
Generator
D.U.T.
500Ω
500Ω
C
L
R
T
V
IN
V
OUT
(1, 2)
ALVC Link
INPUT
V
IH
0V
V
OH
V
OL
t
PLH1
t
SK (x)
OUTPUT 1
OUTPUT 2
t
PHL1
t
SK (x)
t
PLH2
t
PHL2
V
T
V
T
V
OH
V
T
V
OL
t
SK(x)
= t
PLH2 -
t
PLH1 or
t
PHL2 -
t
PHL1
ALVC Link
SAME PHASE
INPUT TRANSITION
OPPOSITE PHASE
INPUT TRANSITION
0V
0V
V
OH
VOL
t
PLH
t
PHL
t
PHL
t
PLH
OUTPUT
VIH
VT
VT
VIH
VT
ALVC Link
DATA
INPUT
0V
0V
0V
0V
t
REM
TIMING
INPUT
SYNCHRONOUS
CONTROL
t
SU
t
H
t
SU
t
H
V
IH
V
T
V
IH
V
T
V
IH
V
T
V
IH
V
T
ALVC Link
ASYNCHRONOUS
CONTROL
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
V
T
t
W
V
T
ALVC Link
CONTROL
INPUT
t
PLZ
0V
OUTPUT
NORMALLY
LOW
tPZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
SWITCH
OPEN
t
PHZ
0V
V
OL
+ V
LZ
V
OH
V
T
V
T
t
PZL
V
LOAD/2
V
LOAD/2
V
IH
V
T
V
OL
V
OH -
V
HZ
ALVC Link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuit for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2ns; tR ≤ 2ns.
Output Skew - tSK(X)
Pulse Width
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Symbol VCC
(1)
= 3.3V±0.3V VCC
(1)
= 2.7V VCC
(2)
= 2.5V±0.2V Unit
VLOAD 6 6 2 x Vcc V
VIH 2.7 2.7 Vcc V
VT 1.5 1.5 Vcc / 2 V
VLZ 300 300 150 mV
VHZ 300 300 150 mV
C
L 50 50 30 pF
TEST CONDITIONS
SWITCH POSITION
Test Switch
Open Drain
Disable Low V
LOAD
Enable Low
Disable High GND
Enable High
All Other Tests Open
INDUSTRIAL TEMPERATURE RANGE
6
IDT74ALVC16244A
3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
ORDERING INFORMATION
XX
ALVC
XXX
XX
Package
Device Type
Temp. Range
PAG
16
74
Thin Shrink Small Outline Package - Green
16-Bit Buffer/Driver with 3-State Outputs
– 40°C to +85°C
XXX
Family
Bus-Hold
244A
No Bus-Hold
Double-Density, ±24mA
Blank
Blank
8
Tube
Tape and Reel
X
CORPORATE HEADQUARTERS for SALES: for Tech Support:
6024 Silver Creek Valley Road 800-345-7015 or 408-284-8200 logichelp@idt.com
San Jose, CA 95138 fax: 408-284-2775
www.idt.com
DATASHEET DOCUMENT HISTORY
06/15/2016 Pg. 6 Updated the ordering information by adding Tape and Reel.
P1-P3P4-P6

74ALVC16244APAG8

Mfr. #:
Buy 74ALVC16244APAG8
Manufacturer:
IDT
Description:
Buffers & Line Drivers 3.3V FAST CMOS 18BIT
Lifecycle:
New from this manufacturer.
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