PRODUCTION D
A
TA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 10
Copyright © 2000
Rev. 1.0, 2005-08-10
WWW.Microsemi .COM
LX1672
Multiple Output LoadSHARE™ PWM
TM
®
THEORY OF OPERATION
G
ENERAL DESCRIPTION
The LX1672 is a voltage-mode pulse-width modulation
controller integrated circuit. The internal ramp generator
frequency is fixed to 300kHz. The device has external
compensation, for more flexibility of output current magnitude.
U
NDER VOLTAGE LOCKOUT (UVLO)
At power up, the LX1672 monitors the supply voltage for
VCC, VCCL, and VCX (there is no requirement for sequencing
the supplies). Before all supplies reach their under-voltage lock-
out (UVLO) thresholds, the soft-start (SS) pin is held low to
prevent soft-start from beginning, the oscillator is disabled and all
MOSFETs are held off. There is an internal delay that will filter
out transients less that 1.5µSec.
S
OFT-START
Once the supplies are above the UVLO threshold, the soft-start
capacitor begins to be charged by the reference through a 20kΩ
internal resistor. The capacitor voltage at the SS pin rises as a
simple RC circuit. The SS pin is connected to the error
amplifier’s non-inverting input that controls the output voltage.
The output voltage will follow the SS pin voltage if sufficient
charging current is provided to the output capacitor.
The simple RC soft-start allows the output to rise faster at the
beginning and slower at the end of the soft-start interval. Thus,
the required charging current into the output capacitor is less at
the end of the soft-start interval. A comparator monitors the SS
pin voltage and indicates the end of soft-start when SS pin
voltage reaches 95% of V
REF
.
OVER-CURRENT PROTECTION (OCP) AND HICCUP
The LX1672 uses the R
DS(ON)
of the upper MOSFET, together
with a resistor (R
SET
) to set the actual current limit point. The
current sense comparator senses the MOSFET current 350nS
after the top MOSFET is switched on in order to reduce
inaccuracies due to ringing. A current source supplies a current
(I
SET
), whose magnitude is 50µA. The set resistor R
SET
is
selected to set the current limit for the application. R
SET
and VSX
should be connected directly at the upper MOSFET drain and
source to get an accurate measurement across the low resistance
R
DS(ON)
.
When the sensed voltage across R
DS(ON)
plus the set resistor
exceeds the 300mV, V
TRIP
threshold, the OCP comparator outputs
a signal to reset the PWM latch and to start hiccup mode. The
soft-start capacitor (C
SS
) is discharged slowly (10 times slower
than when being charged up by R
SS
). When the voltage on the SS
pin reaches a 0.1V threshold, hiccup finishes and the circuit soft-
starts again. During hiccup both MOSFETs for that phase are
held off.
Hiccup is disabled during the soft-start interval, allowing start
up with maximum current. If the rate of rise of the output voltage
is too fast, the required charging current to the output capacitor
may be higher than the limit-current. In this case, the peak
MOSFET current is regulated to the limit-current by the current-
sense comparator. If the MOSFET current still reaches its limit
after the soft-start finishes, the hiccup is triggered again. When the
output has a short circuit the hiccup circuit ensures that the
average heat generation in both MOSFETs and the average current
is much less than in normal operation.
Over-current protection can also be implemented using a sense
resistor, instead of using the R
DS(ON)
of the upper MOSFET, for
greater set-point accuracy.
O
SCILLATOR FREQUENCY
An internal oscillator sets the PWM switching frequency at
300KHz, 500KHz, or 600KHz.
T
HEORY OF OPERATION FOR A BI-PHASE, LOADSHARE
CONFIGURATION
The basic principle used in LoadSHARING™, in a multiple
phase buck converter topology, is that if multiple, identical,
inductors have the same identical voltage impressed across their
leads, they must then have the same identical current passing
through them. The current that we would like to balance between
inductors is mainly the DC component along with as much as
possible the transient current. All inductors in a multiphase buck
converter topology have their output side tied together at the
output filter capacitors. Therefore, this side of all the inductors
have the same identical voltage.
If the input side of the inductors can be forced to have the same
equivalent DC potential on this lead, then they will have the same
DC current flowing. To achieve this requirement, phase 1 will be
the control phase that sets the output operating voltage, under
normal PWM operation. To force the current of phase 2 to be
equal to the current of phase 1, a second feedback loop is used.
Phase 2 has a low pass filter connected from the input side of each
inductor. This side of the inductors has a square wave signal that
is proportional to its duty cycle. The output of each LPF is a DC
(+ some AC) signal that is proportional to the magnitude and duty
cycle of its respective inductor signal. The second feedback loop
will use the output of the phase 1 LPF as a reference signal for an
error amplifier that will compare this reference to the output of the
phase 2 LPF. This error signal will be amplified and used to
control the PWM circuit of phase 2. Therefore, the duty cycle of
phase 2 will be set so that the equivalent voltage potential will be
forced across the phase 2 inductor as compared to the phase 1
inductor. This will force the current in the phase 2 inductor to
follow and be equal to the current in the phase 1 inductor.
There are four methods that can be used to implement the
LoadSHARE feature of the LX1672 in the Bi-Phase mode of
operation.
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PRODUCTION D
A
TA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 11
Copyright © 2000
Rev. 1.0, 2005-08-10
WWW.Microsemi .COM
LX1672
Multiple Output LoadSHARE™ PWM
TM
®
THEORY OF OPERATION (CONTINUED)
B
I-PHASE, LOADSHARE ( ESR METHOD)
The first method is to change the ratio of the inductors
equivalent series resistance, (ESR). As can be seen in the previous
example, if the offset error is zero and the ESR of the two
inductors are identical; then the two inductor currents will be
identical. To change the ratio of current between the two
inductors, the value of the inductor’s ESR can be changed to allow
more current to flow through one inductor than the other. The
inductor with the lower ESR value will have the larger current.
The inductor currents are directly proportional to the ratio of the
inductor’s ESR value.
The following circuit description shows how to select the
inductor ESR for each phase where a different amount of power is
taken from two different input power supplies. A typical setup will
have a +5V power supply connected to the phase 1 half bridge
driver and a +3.3V power supply connected to the phase 2 half
bridge driver. The combined power output for this core voltage is
18W (+1.5V @ 12A). For this example the +5V power supply will
supply 7W and the +3.3V power supply will supply the other 11W.
7W @ 1.5V is a 4.67A current through the phase 1 inductor. 11W
@ 1.5V is a 7.33A current through the phase 2 inductor. The
ratio of inductor ESR is inversely proportional to the power level
split.
1
2
2
1
I
I
ESR
ESR
=
The higher current inductor will have the lower ESR value. If
the ESR of the phase 1 inductor is selected as 10mΩ, then the ESR
value of the phase 2 inductor is calculated as:
m4.6m10
33.7
67.4
=×
A
A
Depending on the required accuracy of this power sharing;
inductors can be chosen from standard vendor tables with an ESR
ratio close to the required values. Inductors can also be designed
for a given application so that there is the least amount of
compromise in the inductor’s performance.
1.5V @ 12A
18W
6.4mΩ
4.67A
7.33A
10m
Ω
1.5V +
46.7mV
L1
L2
+5V @ 7W
+3.3V @ 11W
VOUT
Figure 7 – Ratio LoadSHARE™ Using Inductor ESR
BI-PHASE, LOADSHARE ( FEEDBACK DIVIDER METHOD)
Sometimes it is desirable to use the same inductor in both phases
while having a much larger current in one phase versus the other. A
simple resistor divider can be used on the input side of the Low Pass
Filter that is taken off of the switching side of the inductors. If the
Phase 2 current is to be larger than the current in Phase 1; the resistor
divider is placed in the feedback path before the Low Pass Filter that
is connected to the Phase 2 inductor. If the Phase 2 current needs to
be less than the current in Phase 1; the resistor divider is then placed
in the feedback path before the Low Pass Filter that is connected to
the Phase 1 inductor.
As in Figure 7, the millivolts of DC offset created by the resistor
divider network in the feedback path, appears as a voltage generator
between the ESR of the two inductors.
A divider in the feedback path from Phase 2 will cause the
voltage generator to be positive at Phase 2. With a divider in the
feedback path of Phase 1 the voltage generator becomes positive at
Phase 1. The Phase with the positive side of the voltage generator
will have the larger current. Systems that operate continuously
above a 30% power level can use this method, a down side is that
that the current difference between the two inductors still flows
during a no load condition.
This produces a low efficiency condition during a no load or light
load
state, this method should not be used if a wide range of output
power is required.
The following description and Figure 8 show how to determine
the value of the resistor divider network required to generate the
offset voltage necessary to produce the different current ratio in the
two output inductors. The power sharing ratio is the same as that of
Figure 7. The Offset Voltage Generator is symbolic for the DC
voltage offset between Phase 1 & 2. This voltage is generated by
small changes in the duty cycle of Phase 2. The output of the LPF is
a DC voltage proportional to the duty cycle on its input. A small
amount of attenuation by a resistor divider before the LPF of Phase 2
will cause the duty cycle of Phase 2 to increase to produce the added
offset at V2. The high DC gain of the error amplifier will force
LPF2 to always be equal to LPF1. The following calculations
determine the value of the resistor divider necessary to satisfy this
example.
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PRODUCTION D
A
TA SHEET
Microsemi
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 12
Copyright © 2000
Rev. 1.0, 2005-08-10
WWW.Microsemi .COM
LX1672
Multiple Output LoadSHARE™ PWM
TM
®
THEORY OF OPERATION (CONTINUED)
.
L1,
Switch
Side
L2,
Switch
Side
100
Not
Used
62k
4700pF
+
-
PWM
Input
62k
4700pF
62k
TBD
100
Offset
Voltage
Generator
-
+
ESR L1
10m
Ω
ESR L2
10m
Ω
Vout1
1.5V @ 12A
18W
Resistor
Divider
Resistor
Divider
Phase 2
Error Amp
Phase 1
Phase 2
V1
V2
1.5V
+73.3mV
1.5V
+46.7mV
7.33A
4.67A
+5V @ 7W
+3.3V @ 11W
LPF1
LPF2
Figure 8 – LoadSHARE™ Using Feedback Divider Offset
Where V1 = 1.5467 ; V2 = 1.5733 and
2V
1V
K =
then
K 5.814
K1
100 K
TBD =
×
=
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LX1672-03CPW

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Switching Controllers
Lifecycle:
New from this manufacturer.
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