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PCA9549D,118

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PCA9549_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 13 July 2009 10 of 25
NXP Semiconductors
PCA9549
Octal bus switch with individually I
2
C-bus controlled enables
7.4 Bus transactions
Data is transmitted to the PCA9549 control register using the Write mode as shown in
Figure 12.
Data is read from the PCA9549 using the Read mode as shown in Figure 13.
8. Limiting values
[1] The performance capability of a high-performance integrated circuit in conjunction with its thermal
environment can create junction temperatures which are detrimental to reliability. The maximum junction
temperature of this integrated circuit should not exceed 125 °C.
Fig 12. Write control register
Fig 13. Read control register
002aac430
B7 B6 B5 B4 B3 B2 B1 B01 1 0 A2 A1 A0 0 AS 1 A P
slave address
START condition R/W acknowledge
from slave
acknowledge
from slave
control register
SDA
STOP condition
002aac431
1 1 0 A2 A1 A0 1 AS 1 A P
slave address
START condition R/W acknowledge
from slave
no acknowledge
from master
control register
SDA
STOP condition
last byte
B7 B6 B5 B4 B3 B2 B1 B0
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage −0.5 +7.0 V
V
I
input voltage −0.5 +7.0 V
I
I
input current −20 +20 mA
I
O
output current −25 +25 mA
I
DD
supply current −100 +100 mA
I
SS
ground supply current −100 +100 mA
P
tot
total power dissipation - 400 mW
T
stg
storage temperature −60 +150 °C
T
amb
ambient temperature operating −40 +85 °C
PCA9549_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 13 July 2009 11 of 25
NXP Semiconductors
PCA9549
Octal bus switch with individually I
2
C-bus controlled enables
9. Static characteristics
[1] For operation between published voltage ranges, refer to the worst-case parameters in both ranges.
[2] V
DD
must be lowered to 0.2 V in order to reset part.
Table 6. Static characteristics at V
DD
= 2.3 V to 3.6 V
V
SS
= 0 V; T
amb
=
−
40
°
C to +85
°
C; unless otherwise specified. See Table 7 on page 12 for V
DD
= 4.5 V to 5.5 V
[1]
.
Symbol Parameter Conditions Min Typ Max Unit
Supply
V
DD
supply voltage 2.3 - 3.6 V
I
DD
supply current Operating mode; V
DD
= 3.6 V; no load;
V
I
=V
DD
or V
SS
; f
SCL
= 100 kHz
-2050µA
I
stb
standby current Standby mode; V
DD
= 3.6 V; no load;
V
I
=V
DD
or V
SS
- 0.1 1 µA
V
POR
power-on reset voltage no load; V
I
=V
DD
or V
SS
[2]
- 1.6 2.1 V
Input SCL; input/output SDA
V
IL
LOW-level input voltage −0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-6 V
I
OL
LOW-level output current V
OL
= 0.4 V 3 - - mA
V
OL
= 0.6 V 6 - - mA
I
L
leakage current V
I
=V
DD
or V
SS
−1-+1 µA
C
i
input capacitance V
I
=V
SS
- 6 21 pF
Select inputs A0 to A2,
RESET
V
IL
LOW-level input voltage −0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-V
DD
+ 0.5 V
I
LI
input leakage current pin at V
DD
or V
SS
−1-+1 µA
C
i
input capacitance V
I
=V
SS
-25 pF
Pass gate
R
on
ON-state resistance V
DD
= 3.0 V to 3.6 V; V
O
= 0.4 V;
I
O
=15mA
-712Ω
V
DD
= 2.3 V to 2.7 V; V
O
= 0.4 V;
I
O
=10mA
-815Ω
V
o(sw)
switch output voltage V
i(sw)
=V
DD
= 3.3 V; I
o(sw)
= −100 µA - 1.9 - V
V
i(sw)
=V
DD
= 3.0 V to 3.6 V;
I
o(sw)
= −100 µA
1.6 - 2.8 V
V
i(sw)
=V
DD
= 2.5 V; I
o(sw)
= −100 µA - 1.5 - V
V
i(sw)
=V
DD
= 2.3 V to 2.7 V;
I
o(sw)
= −100 µA
1.0 - 2.0 V
I
L
leakage current V
I
=V
DD
or V
SS
−1-+1 µA
C
io
input/output capacitance V
I
=V
SS
-35 pF
PCA9549_2 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 02 — 13 July 2009 12 of 25
NXP Semiconductors
PCA9549
Octal bus switch with individually I
2
C-bus controlled enables
[1] For operation between published voltage ranges, refer to the worst-case parameters in both ranges.
[2] V
DD
must be lowered to 0.2 V in order to reset part.
Table 7. Static characteristics at V
DD
= 4.5 V to 5.5 V
V
SS
= 0 V; T
amb
=
−
40
°
C to +85
°
C; unless otherwise specified. See Table 6 on page 11 for V
DD
= 2.3 V to 3.6 V
[1]
.
Symbol Parameter Conditions Min Typ Max Unit
Supply
V
DD
supply voltage 4.5 - 5.5 V
I
DD
supply current Operating mode; V
DD
= 5.5 V;
no load; V
I
=V
DD
or V
SS
;
f
SCL
= 100 kHz
- 65 100 µA
I
stb
standby current Standby mode; V
DD
= 5.5 V;
no load; V
I
=V
DD
or V
SS
- 0.6 2 µA
V
POR
power-on reset voltage no load; V
I
=V
DD
or V
SS
[2]
- 1.7 2.1 V
Input SCL; input/output SDA
V
IL
LOW-level input voltage −0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-6 V
I
OL
LOW-level output current V
OL
= 0.4 V 3 - - mA
V
OL
= 0.6 V 6 - - mA
I
IL
LOW-level input current V
I
=V
SS
1- 1 µA
I
IH
HIGH-level input current V
I
=V
SS
1- 1 µA
C
i
input capacitance V
I
=V
SS
- 6 21 pF
Select inputs A0 to A2,
RESET
V
IL
LOW-level input voltage −0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-V
DD
+ 0.5 V
I
LI
input leakage current pin at V
DD
or V
SS
−1 - +50 µA
C
i
input capacitance V
I
=V
SS
-25 pF
Pass gate
R
on
ON-state resistance V
DD
= 4.5 V to 5.5 V; V
O
= 0.4 V;
I
O
=15mA
-58 Ω
V
o(sw)
switch output voltage V
i(sw)
=V
DD
= 5.0 V;
I
o(sw)
= −100 µA
- 3.6 - V
V
i(sw)
=V
DD
= 4.5 V to 5.5 V;
I
o(sw)
= −100 µA
2.6 - 4.5 V
I
L
leakage current V
I
=V
DD
or V
SS
−10 - +10 µA
C
io
input/output capacitance V
I
=V
SS
-35 pF
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PCA9549D,118

Mfr. #:
Buy PCA9549D,118
Manufacturer:
NXP Semiconductors
Description:
IC SWITCH OCTAL BUS 24-SOIC
Lifecycle:
New from this manufacturer.
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