MC14514BCPG

© Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 9
1 Publication Order Number:
MC14514B/D
MC14514B, MC14515B
4-Bit Transparent Latch /
4-to-16 Line Decoder
The MC14514B and MC14515B are two output options of a 4 to 16
line decoder with latched inputs. The MC14514B (output active high
option) presents a logical “1” at the selected output, whereas the
MC14515B (output active low option) presents a logical “0” at the
selected output. The latches are RS type flipflops which hold the
last input data presented prior to the strobe transition from “1” to “0”.
These high and low options of a 4bit latch / 4 to 16 line decoder are
constructed with Nchannel and Pchannel enhancement mode
devices in a single monolithic structure. The latches are RS type
flipflops and data is admitted upon a signal incident at the strobe
input, decoded, and presented at the output.
These complementary circuits find primary use in decoding
applications where low power dissipation and/or high noise immunity
is desired.
Features
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Lowpower TTL Loads or One Lowpower
Schottky TTL Load the Rated Temperature Range
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to V
SS
)
Parameter
Symbol Value Unit
DC Supply Voltage Range V
DD
0.5 to +18.0 V
Input or Output Voltage Range
(DC or Transient)
V
in
, V
out
0.5 to V
DD
+0.5
V
Input or Output Current (DC or Transient)
per Pin
I
in
, I
out
±10 mA
Power Dissipation per Package (Note 1) P
D
500 mW
Ambient Temperature Range T
A
55 to +125 °C
Storage Temperature Range T
stg
65 to +150 °C
Lead Temperature (8Second Soldering) T
L
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v (V
in
or V
out
) v V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
xx = 14 or 15
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = PbFree Package
MARKING DIAGRAM
1
24
SOIC24
DW SUFFIX
CASE 751E
145xxB
AWLYYWWG
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
S5
S7
D2
D1
ST
S3
S4
S6 S10
D3
D4
INH
V
DD
S15
S14
S9
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
13
11
12
21
22
23
24
S13
S12
S8
S11
S0
V
SS
S2
S1
PIN ASSIGNMENT
MC14514B, MC14515B
http://onsemi.com
2
Data
Inputs
Selected Output
MC14514 = Logic “1”
Inhibit D C B A MC14515 = Logic “0”
00000 S0
00001 S1
00010 S2
00011 S3
00100 S4
00101 S5
00110 S6
00111 S7
01000 S8
01001 S9
0 1 0 1 0 S10
01011 S11
0 1 1 0 0 S12
0 1 1 0 1 S13
0 1 1 1 0 S14
0 1 1 1 1 S15
1 X X X X All Outputs = 0, MC14514
All Outputs = 1, MC14515
DECODE TRUTH TABLE (Strobe = 1)*
X = Don’t Care
*Strobe = 0, Data is latched
BLOCK DIAGRAM
V
DD
= PIN 24
V
SS
= PIN 12
4 TO 16
DECODER
TRANSPARENT
LATCH
STROBE
INHIBIT
2
3
1
21
22
23
DATA 1
DATA 2
DATA 3
DATA 4
A
B
C
D20
17
18
4
5
6
7
8
10
9
11
19
16
13
14
15
A
B C D
A B C D
A B C D
A B C D
A B C D
A B C D
A B C D
A B C D
A B C D
A B C D
A
B C D
A B C
D
A B C D
A B
C D
A
B C D
A B C DS15
S14
S13
S12
S11
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
ORDERING INFORMATION
Device Package Shipping
MC14514BDWR2G
SOIC24
(PbFree)
1000 / Tape & Reel
NLV14514BDWR2G*
MC14515BDWR2G
SOIC24
(PbFree)
1000 / Tape & Reel
NLV14515BDWR2G*
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ100 Qualified and PPAP
Capable.
MC14514B, MC14515B
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
Characteristic
Symbol
V
DD
Vdc
55_C 25_C 125_C
Unit
Min Max Min
Typ
(Note 2)
Max Min Max
Output Voltage “0” Level
V
in
= V
DD
or 0
“1” Level
V
in
= 0 or V
DD
V
OL
5.0
10
15
0.05
0.05
0.05
0
0
0
0.05
0.05
0.05
0.05
0.05
0.05
Vdc
V
OH
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
5.0
10
15
4.95
9.95
14.95
Vdc
Input Voltage “0” Level
(V
O
= 4.5 or 0.5 Vdc)
(V
O
= 9.0 or 1.0 Vdc)
(V
O
= 13.5 or 1.5 Vdc)
“1” Level
(V
O
= 0.5 or 4.5 Vdc)
(V
O
= 1.0 or 9.0 Vdc)
(V
O
= 1.5 or 13.5 Vdc)
V
IL
5.0
10
15
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
Vdc
V
IH
5.0
10
15
3.5
7.0
11
3.5
7.0
11
2.75
5.50
8.25
3.5
7.0
11
Vdc
Output Drive Current
(V
OH
= 2.5 Vdc) Source
(V
OH
= 4.6 Vdc)
(V
OH
= 9.5 Vdc)
(V
OH
= 13.5 Vdc)
(V
OL
= 0.4 Vdc) Sink
(V
OL
= 0.5 Vdc)
(V
OL
= 1.5 Vdc)
I
OH
5.0
5.0
10
15
– 1.2
– 0.25
– 0.62
– 1.8
– 1.0
– 0.2
– 0.5
– 1.5
– 1.7
– 0.36
– 0.9
– 3.5
– 0.7
– 0.14
– 0.35
– 1.1
mAdc
I
OL
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mAdc
Input Current I
in
15 ±0.1 ±0.00001 ±0.1 ±1.0
mAdc
Input Capacitance (V
in
= 0) C
in
5.0 7.5 pF
Quiescent Current (Per Package) I
DD
5.0
10
15
5.0
10
20
0.005
0.010
0.015
5.0
10
20
150
300
600
mAdc
Total Supply Current (Note 3, 4)
(Dynamic plus Quiescent,
Per Package)
(C
L
= 50 pF on all outputs, all
buffers switching)
I
TL
5.0
10
15
I
T
= (1.35 mA/kHz) f + I
DD
I
T
= (2.70 mA/kHz) f + I
DD
I
T
= (4.05 mA/kHz) f + I
DD
mAdc
2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
4. To calculate total supply current at loads other than 50 pF: I
T
(C
L
) = I
T
(50 pF) + (C
L
– 50) Vfk where: I
T
is in mA (per package), C
L
in pF,
V = (V
DD
– V
SS
) in volts, f in kHz is input frequency, and k = 0.002.

MC14514BCPG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC LATCH/DCODER 4BIT 4-16 24-DIP
Lifecycle:
New from this manufacturer.
Delivery:
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