74AUP3G3404 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 14 January 2013 9 of 22
NXP Semiconductors
74AUP3G3404
Low-power dual buffer and single inverter
11. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions 25 C 40 C to +125 C Unit
Min Typ
[1]
Max Min Max
(85 C)
Max
(125 C)
C
L
= 5 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 16.0 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.4 5.0 10.3 2.0 11.4 12.6 ns
V
CC
= 1.4 V to 1.6 V 1.8 3.6 6.4 1.6 7.4 8.2 ns
V
CC
= 1.65 V to 1.95 V 1.5 2.9 5.0 1.4 5.9 6.5 ns
V
CC
= 2.3 V to 2.7 V 1.2 2.4 3.9 1.1 4.5 5.0 ns
V
CC
= 3.0 V to 3.6 V 1.1 2.1 3.2 1.0 3.9 4.3 ns
C
L
= 10 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 19.8 - - - - ns
V
CC
= 1.1 V to 1.3 V 2.8 5.9 12.2 2.3 13.7 15.1 ns
V
CC
= 1.4 V to 1.6 V 2.3 4.2 7.5 1.9 8.7 9.6 ns
V
CC
= 1.65 V to 1.95 V 2.0 3.5 5.9 1.7 7.0 7.7 ns
V
CC
= 2.3 V to 2.7 V 1.7 2.9 4.6 1.5 5.4 6.0 ns
V
CC
= 3.0 V to 3.6 V 1.6 2.7 3.8 1.4 4.5 5.1 ns
C
L
= 15 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 23.3 - - - - ns
V
CC
= 1.1 V to 1.3 V 3.2 6.7 13.0 2.6 15.8 17.4 ns
V
CC
= 1.4 V to 1.6 V 2.6 4.7 8.6 2.2 10.0 11.0 ns
V
CC
= 1.65 V to 1.95 V 2.3 4.0 6.7 2.0 8.0 8.8 ns
V
CC
= 2.3 V to 2.7 V 2.1 3.3 5.1 1.8 6.1 6.8 ns
V
CC
= 3.0 V to 3.6 V 2.0 3.1 4.2 1.6 5.0 5.5 ns
C
L
= 30 pF
t
pd
propagation delay nA to nY; see Figure 8
[2]
V
CC
= 0.8 V - 33.6 - - - - ns
V
CC
= 1.1 V to 1.3 V 4.4 8.9 16.3 3.6 19.0 20.9 ns
V
CC
= 1.4 V to 1.6 V 3.6 6.3 10.8 3.2 12.9 14.2 ns
V
CC
= 1.65 V to 1.95 V 3.2 5.3 9.0 2.9 10.5 11.6 ns
V
CC
= 2.3 V to 2.7 V 2.9 4.5 6.5 2.6 7.6 8.5 ns
V
CC
= 3.0 V to 3.6 V 2.9 4.2 5.6 2.5 6.2 7.2 ns