74HC_HCT132 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet Rev. 4 — 1 December 2015 10 of 19
NXP Semiconductors
74HC132; 74HCT132
Quad 2-input NAND Schmitt trigger
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
P
add
=f
i
(t
r
I
CC(AV)
+t
f
I
CC(AV)
) V
CC
where:
P
add
= additional power dissipation (W);
f
i
= input frequency (MHz);
t
r
=rise time (ns); 10%to90%;
t
f
= fall time (ns); 90 % to 10 %;
I
CC(AV)
= average additional supply current (A).
Average I
CC(AV)
differs with positive or negative input transitions, as shown in Figure 11
and Figure 12
.
An example of a relaxation circuit using the 74HC132; 74HCT132 is shown in Figure 13
.
a. V
CC
=4.5V b. V
CC
=5.5V
Fig 10. Typical 74HCT132 transfer characteristics
9
9
,
&&
P$
9
9
,
&&
P$
