AD5530/AD5531
Rev. B | Page 16 of 20
LDAC
is controlled by the PC6 port output. The DAC can be
updated after each 2-byte transfer by bringing
LDAC
low. This
example does not show other serial lines for the DAC. If
CLR
were used, it could be controlled by port output PC5. To read
data back from the DAC register, the SDO line can be
connected to MISO of the MC68HC11, with
RBEN
tied to
another port output controlling and framing the readback
data transfer.
AD5530/AD5531
Rev. B | Page 17 of 20
APPLICATIONS INFORMATION
SERIAL INTERFACE TO MULTIPLE AD5530s OR
AD5531s
OPTOCOUPLER INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled. Opto-isolators can provide voltage isolation in
excess of 3 kV. The serial loading structure of the AD5530/
AD5531 makes it ideal for opto-isolated interfaces because the
number of interface lines is kept to a minimum.
SYNC
Figure 26
shows a 4-channel isolated interface to the AD5530/AD5531.
To reduce the number of opto-isolators, if simultaneous
updating is not required, then the
LDAC
pin can be tied
permanently low.
00938-026
µCONTROLLER
CONTROL OUT TO LDAC
SYNC OUT TO SYNC
SERIAL CLOCK OUT TO SCLK
SERIAL DATA OUT TO SDIN
OPTOCOUPLER
V
CC
Figure 26. Opto-Isolated Interface
Figure 27 shows how the pin is used to address multiple
AD5530/AD5531s. All devices receive the same serial clock and
serial data, but only one device receives the
SYNC
signal at any
one time. The DAC addressed is determined by the decoder.
There is some feedthrough from the digital input lines, the
effects of which can be minimized by using a burst clock.
00938-027
AD5530/AD5531
1
V
OUT
SYNC
SDIN
SCLK
AD5530/AD5531
1
V
OUT
SYNC
SDIN
SCLK
AD5530/AD5531
1
V
OUT
SYNC
SDIN
SCLK
AD5530/AD5531
1
V
OUT
SYNC
SDIN
SCLK
SCLK
SDIN
V
CC
DECODER
1
ENABLE
EN
CODED
ADDRESS
DGND
1
ADDITIONAL PINS
OMITTED FOR CLARITY.
Figure 27. Addressing Multiple AD5530/AD5531s
DAISY-CHAINING INTERFACE WITH MULTIPLE AD5530s OR AD5531s
A number of these DAC parts can be daisy-chained together using the SDO pin. Figure 28 illustrates such a configuration.
0
0938-028
AD5530/AD5531
1
SDO
SCLK
SDIN
SYNC
SCLK
SDIN
S
YNC
AD5530/AD5531
1
SDO
SCLK
SDIN
SYNC
AD5530/AD5531
1
SDO
SCLK
SDIN
SYNC
TO OTHER
SERIAL DEVICES
V
DD
R R
R
1
ADDITIONAL PINS OMITTED FOR CLARITY.
Figure 28. Daisy-Chaining Multiple AD5530/AD5531s
AD5530/AD5531
Rev. B | Page 18 of 20
OUTLINE DIMENSIONS
16
9
81
PIN 1
SEATING
PLANE
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09
0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 29. 16-Lead Thin Shrink Small Outline Package (TSSOP)
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Resolution INL (LSBs) DNL (LSBs) Package Description Package Option
AD5530BRU −40°C to +85°C 12 ±1 ±1 16-Lead TSSOP RU-16
AD5530BRU-REEL −40°C to +85°C 12 ±1 ±1 16-Lead TSSOP RU-16
AD5530BRU-REEL7 −40°C to +85°C 12 ±1 ±1 16-Lead TSSOP RU-16
AD5530BRUZ −40°C to +85°C 12 ±1 ±1 16-Lead TSSOP RU-16
1
AD5530BRUZ-REEL −40°C to +85°C 12 ±1 ±1 16-Lead TSSOP RU-16
1
AD5530BRUZ-REEL7 −40°C to +85°C 12 ±1 ±1 16-Lead TSSOP RU-16
1
AD5531BRU −40°C to +85°C 14 ±2 ±1 16-Lead TSSOP RU-16
AD5531BRU-REEL −40°C to +85°C 14 ±2 ±1 16-Lead TSSOP RU-16
AD5531BRU-REEL7 −40°C to +85°C 14 ±2 ±1 16-Lead TSSOP RU-16
AD5531BRUZ −40°C to +85°C 14 ±2 ±1 16-Lead TSSOP RU-16
1
AD5531BRUZ-REEL −40°C to +85°C 14 ±2 ±1 16-Lead TSSOP RU-16
1
AD5531BRUZ-REEL7 −40°C to +85°C 14 ±2 ±1 16-Lead TSSOP RU-16
1
1
Z = Pb-free part.

AD5531BRU-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 14-BIT VTG OUTPUT IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union