4
Figure 2. Demoboard and application schematic diagram
Notes
L3 and the module’s internal input pre-match form the input matching network. The RFin pin, pin 3, is directly connected to a shunt inductor that
is grounded. The RF output lter blocks DC. Best noise performance is obtained using high-Q wirewound inductors. This circuit demonstrates that
low noise gures are obtainable with standard 0402 chip inductors. Replacing L2 and L3 with high-Q wirewound inductors (eg. Coilcraft 0402CS
series) will yield lower NF and higher Gain.
C2 and L2 form a matching network at the output of the LNA, which can be tuned to optimize gain, output return loss and linearity. For example,
higher gain can be obtained by increasing the value of C2 but at the expense of stability.
L1 and R1 isolates the demoboard from external disturbances during measurement. It is not needed in actual application. Likewise, C1 and C3
mitigate the e ect of external noise pickup on the Vdd and SD lines respectively. These components are not required in actual operation.
The output of the module is internally ac-coupled to pin 8.
Bias control is achieved by either varying the SD voltage with/ without R2, or xing the SD voltage to Vdd and adjusting R2 for the desired current.
R2 = 3.9 kOhm will result in 6mA when Vdd=Vsd = 2.7V and 4mA when Vdd = Vsd = 1.8V.
8
3
Input
Match
Filter
LNA
R2
Vsd (Pin 1)
50 -Ohms TL
50 -Ohms TL50 -Ohms TL
Vdd (Pin 12)
L2
C2
C1
L1
R1
C3
L3
2, 4, 5, 6, 7, 9, 10, 11
