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LTC1064CSW#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
LTC1064
7
1064fb
ANALOG
GROUND
PLANE
NOTE: CONNECT ANALOG AND DIGITAL
GROUND PLANES AT A SINGLE POINT AT
THE BOARD EDGE
FOR BEST HIGH FREQUENCY RESPONSE
PLACE RESISTORS PARALLEL TO DOUBLE-
SIDED COPPER CLAD BOARD AND LAY FLAT
(4 RESISTORS SHOWN HERE TYPICAL)
LTC1064
0.1µF
CERAMIC
PIN 1 IDENT
1064 F02
5k
–7.5V
7.5V
0.1µF CERAMIC
(SINGLE POINT
GROUND)
CLOCK
V
IN
1
2
3
4
5
6
7
8
9
10
11
12
DIGITAL
GROUND
PLANE
24
23
22
21
20
19
18
17
16
15
14
13
APPLICATIONS INFORMATION
WUU
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Figure 2. Example Ground Plane Breadboard Technique for LTC1064
ANALOG CONSIDERATIONS
Grounding and Bypassing
The LTC1064 should be used with separated analog and
digital ground planes and single point grounding
techniques.
Pin 6 (AGND) should be tied directly to the analog ground
plane.
Pin 7 (V
+
) should be bypassed to the ground plane with a
0.1µF ceramic capacitor with leads as short as possible.
Pin 19 (V
–
) should be bypassed with a 0.1µF ceramic
capacitor. For single supply applications, V
–
can be tied to
the analog ground plane.
For good noise performance, V
+
and V
–
must be free of
noise and ripple.
All analog inputs should be referenced directly to the
single point ground. The clock inputs should be shielded
from and/or routed away from the analog circuitry and a
separate digital ground plane used.
Figure 2 shows an example of an ideal ground plane
design for a 2-sided board. Of course this much ground
plane will not always be possible, but users should strive
to get as close to this as possible. Protoboards are not
recommended.
Buffering the Filter Output
When driving coaxial cables and 1× scope probes, the
filter output should be buffered. This is important espe-
cially when high Qs are used to design a specific filter.
Inadequate buffering may cause errors in noise, distor-
tion, Q and gain measurements
. When 10× probes are
used, buffering is usually not required. An inverting buffer
is recommended especially when THD tests are per-
formed. As shown in Figure 3, the buffer should be
adequately bypassed to minimize clock feedthrough.
LTC1064
8
1064fb
–
+
∫ ∫
LP
1064 F05
+
Σ
AGND
1/4 LTC1064
NS
–
R1
R2
V
IN
R3
f
O
= ; f
n
= f
O
; H
OLP
= – ; H
OBP
= – ; H
ON1
= – ; Q =
f
CLK
100(50)
R2
R1
R3
R1
R3
R2
R2
R1
BP
C2
0.1µF
C1
0.1µF
R1
1M
R2
1M
1064 F04
TO FILTER
FIRST SUMMING
NODE
C1 = C2 = LOW LEAKAGE FILM
(I.E., POLYPROPYLENE)
R1 = R2 = METAL FILM 1%
FROM
FILTER OUTPUT
R3
100k
–
+
LT1012
7
19
R21
R11
R31
4
7
LTC1064
0.1µF
1µF
V
OUT
1064 F03
10k
R32
R22
R12
0.1µF
V
+
TRACE FOR FILTER
0.1µF
V
IN
–
+
10k
LT
®
318
LT1007
LT1056
NEGATIVE
SUPPLY
POSITIVE
SUPPLY
SEPARATE V
+
POWER SUPPLY TRACE FOR BUFFER
1µF
0.1µF
+
+
APPLICATIONS INFORMATION
WUU
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Offset Nulling
Lowpass filters may have too much DC offset for some
users. A servo circuit may be used to actively null the
offsets of the LTC1064 or any LTC switched-capacitor
filter. The circuit shown in Figure 4 will null offsets to better
than 300µV. This circuit takes seconds to settle because of
the integrator pole frequency.
Noise
All the noise performance mentioned excludes the clock
feedthrough. Noise measurements will degrade if the
already described grounding bypassing and buffering
techniques are not practiced. The graph Wideband Noise
vs Q in the Typical Performance Characteristics section is
a very good representation of the noise performance of
this device.
Figure 3. Buffering the Output of a 4th Order Bandpass Realization
Figure 4. Servo Amplifier
PRIMARY MODES
Mode 1
In Mode 1, the ratio of the external clock frequency to the
center frequency of each 2nd order section is internally
fixed at 50:1 or 100:1. Figure 5 illustrates Mode 1 provid-
ing 2nd order notch, lowpass and bandpass outputs.
Mode 1 can be used to make high order Butterworth
lowpass filters; it can also be used to make low Q notches
and for cascading 2nd order bandpass functions tuned at
the same center frequency with unity gain. Mode 1 is faster
than Mode 3. Note that Mode 1 can only be implemented
with three of the four LTC1064 sections because Section
D has no externally available summing node. Section D,
however, can be internally connected in Mode 1 upon
special request.
ODES OF OPERATIO
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Figure 5. Mode 1: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
LTC1064
9
1064fb
1064 F07 Eq
f
O
= ; f
n
= f
O;
Q
= ;
f
CLK
100(50)
f
CLK
2
R3
R2
R2
R1
R6
R5 + R6
√
R6
R5 + R6
√
H
ON1
(f→ 0) = H
ON2
f→ = – ; H
OLP
= – ;
H
OBP
= – ; R5⏐⏐R6 ≤ 5k
R3
R1
()
R6
R5 + R6
R2
R1
–
+
∫ ∫
LP
+
Σ
AGND
NS
–
BP
R1
R2
V
IN
R3
1064 F07
R6 R5
1/4 LTC1064
1064 F06 Eq
NOTE: THE 50:1 EQUATIONS FOR MODE 3 ARE DIFFERENT FROM THE EQUATIONS
FOR MODE 3 OPERATIONS OF THE LTC1059, LTC1060 AND LTC1061. START WITH
f
O
, CALCULATE R2/R4, SET R4; FROM THE Q VALUE, CALCULATE R3:
f
O
= ; Q = ; H
OHP
= – ;
f
CLK
100
R2
R4
R3
R2
R2
R4
R2
R1
MODE 3 (100:1):
√ √
H
OBP
= – ; H
OLP
= –
R3
R1
R4
R1
f
O
= ; Q = ;
f
CLK
50
R2
R4
MODE 3 (50:1):
√
R2
R3
R2
16R4
R2
R4
1.005
√
–
R3 = ; THEN CALCULATE R1 TO SET
THE DESIRED GAIN.
+
R2
1.005
Q
√
R2
R4
R2
16R4
R3
R1
H
OHP
= – ; H
OBP
= – ; H
OLP
= –
R2
R1
R3
16R4
1 –
R4
R1
–
+
∫ ∫
LP
+
Σ
AGND
HP S
1/4 LTC1064
–
BP
R1
R2
V
IN
R3
R4
1064 F06
C
C
Mode 3
Mode 3 is the second of the primary modes. In Mode 3, the
ratio of the external clock frequency to the center fre-
quency of each 2nd order section can be adjusted above or
below 50:1 or 100:1. Side D of the LTC1064 can only be
connected in Mode 3. Figure 6 illustrates Mode 3, the
classical state variable configuration, providing highpass,
bandpass and lowpass 2nd order filter functions. Mode 3
is slower than Mode 1. Mode 3 can be used to make high
order all-pole bandpass, lowpass, highpass and notch
filters.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case
. This was done to provide
speed without penalizing the noise performance.
SECONDARY MODES
Mode 1b
Mode 1b is derived from Mode 1. In Mode 1b, Figure 7, two
additional resistors R5 and R6 are added to alternate the
amount of voltage fed back from the lowpass output into
the input of the SA (or SB or SC) switched-capacitor
summer. This allows the filter’s clock-to-center frequency
ratio to be adjusted beyond 50:1 or 100:1. Mode 1b
maintains the speed advantages of Mode 1.
Mode 2
Mode 2 is a combination of Mode 1 and Mode 3, as shown
in Figure 8. With Mode 2, the clock-to-center frequency
ratio f
CLK
/f
O
is always less than 50:1 or 100:1. The
advantage of Mode 2 is that it provides less sensitivity to
resistor tolerances than does Mode 3. As in Mode 1,
Mode 2 has a notch output which depends on the clock
frequency and the notch frequency is therefore less than
the center frequency f
O
.
When the internal clock-to-center frequency ratio is set at
50:1, the design equations for Q and bandpass gain are
different from the 100:1 case
.
ODES OF OPERATIO
U
W
Figure 6. Mode 3: 2nd Order Filter Providing Highpass,
Bandpass and Lowpass
Figure 7. Mode 1b: 2nd Order Filter Providing Notch,
Bandpass and Lowpass
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC1064CSW#PBF

Mfr. #:
Buy LTC1064CSW#PBF
Manufacturer:
Analog Devices Inc.
Description:
Active Filter Quad 80kHz Switched Cap Filter
Lifecycle:
New from this manufacturer.
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